XC68HC705JJ7 Motorola, XC68HC705JJ7 Datasheet - Page 89

• Manufacturer Part Number: XC68HC705JJ7
• Description: MICROCONTROLLER
• Manufacturer: Motorola

7.3.5 Port A Logic
MC68HC705JJ7 • MC68HC705JP7 — REV 4
MOTOROLA
1. DDRA can always be read or written.
2. Don’t care
Port A
Pin(s)
PA0
PA1
PA2
PA3
PA4
PA5
WRITE $0000
WRITE $0004
WRITE $0010
RESET
READ $0004
READ $0000
(in MOR)
SWPDI
X
0
0
1
(2)
When a PA0:PA5 pin is programmed as an output, reading the port bit
actually reads the value of the data latch and not the voltage on the pin
itself. When a PA0:PA5 pin is programmed as an input, reading the port
bit reads the voltage level on the pin. The data latch can always be
written, regardless of the state of its DDR bit.
logic of PA0–PA5 pins of port A.
The data latch can always be written, regardless of the state of its DDR
bits.
R
R
PDIAx
X
PORT A DATA
Table 7-1
X
REGISTER
0
1
DATA DIRECTION
(2)
BIT PAx
REGISTER A
PULLDOWN
REGISTER A
BIT PDIAx
Table 7-1. Port A Pin Functions
BIT DDRAx
Figure 7-4. Port A I/O Circuit
Port A
DDRAx
summarizes the operations of the port A pins.
Parallel Input/Output
0
0
0
1
(1)
(Pin or Data Register)
Read
Data
MASK OPTION REG. ($1FF1)
Pin
Pin
Pin
PORTA Access
Write
Data
Data
Data
Data
Figure 7-4
INTERRUPT
EXTERNAL
REQUEST
Pulldown
(PA0:3)
On
Off
Off
Off
PULLDOWN
DEVICE
HIGH SINK/SOURCE
Advance Information
Parallel Input/Output
Port A Pins
Result on
PAx
CAPABILITY
CURRENT
shows the I/O
PAx out
PAx in
PAx in
PAx in
Pin
Port A
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