XC68HC705JJ7 Motorola, XC68HC705JJ7 Datasheet - Page 43
XC68HC705JJ7
Manufacturer Part Number
XC68HC705JJ7
Description
MICROCONTROLLER
Manufacturer
Motorola
Datasheet
1.XC68HC705JJ7.pdf
(242 pages)
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2.7 Erasable Programmable Read-Only Memory (EPROM)
2.8 COP Register
MC68HC705JJ7 • MC68HC705JP7 — REV 4
MOTOROLA
Address: $1FF0
The EPROM is located in three areas of the memory map:
As shown in
the EPROM security
watchdog timer. The OPT bit controls the function of the PB4 port pin
and the availability to add an offset to any measured analog voltages.
See
1. No security feature is absolutely secure. However, Motorola’s strategy is to make reading or
$1FF0
Reset:
Read:
Write: EPMSEC
copying the EPROM/OTPROM difficult for unauthorized users.
•
•
•
8.5 Analog Status Register
Addresses $0700–$1EFF contain 6144 bytes of user EPROM.
Addresses $1FF0–$1FF1 contain 2 bytes of EPROM reserved for
user vectors and COP and security register (COPR), and the mask
option register. Only bit 7 of $1FF0 is a programmable bit.
Addresses $1FF2–$1FFF contain 14 bytes of interrupt vectors.
Bit 7
Figure 2-5. COP and Security Register (COPR)
Figure
= Unimplemented
OPT
6
2-5, a register location is provided at $1FF0 to set
(1)
Memory
, select the optional features, and reset the COP
Erasable Programmable Read-Only Memory (EPROM)
5
Unaffected by reset
for more information
4
3
2
Advance Information
1
Memory
COPC
Bit 0
43
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