XC68HC705JJ7 Motorola, XC68HC705JJ7 Datasheet - Page 52

• Manufacturer Part Number: XC68HC705JJ7
• Description: MICROCONTROLLER
• Manufacturer: Motorola

Interrupts
4.3 Interrupt Vectors
Advance Information
52
Reset
Software
interrupt (SWI)
External
interrupt (IRQ)
Core timer
interrupts
Programmable
timer interrupts
Serial interrupt
Analog interrupt
1. COPEN enables the COP watchdog timer.
2. PIRQ enables port A external interrupts on PA0–PA3.
Function
NOTE:
Power-on logic
RESET pin
Low-voltage reset
Illegal address reset
COP watchdog
User code
IRQ/V
PA3 pin
PA2 pin
PA1 pin
PA0 pin
TOF bit
RTIF bit
ICF bit
OCF bit
TOF bit
SPIF bit
CPF1 bit
CPF2 bit
PP
Source
central processor unit (CPU) registers on the stack and loads the
program counter with a user-defined vector address.
Table 4-1
assignments.
If more than one interrupt request is pending, the CPU fetches the vector
of the higher priority interrupt first. A higher priority interrupt does not
actually interrupt a lower priority interrupt service routine unless the
lower priority interrupt service routine clears the I bit.
pin
Table 4-1. Reset/Interrupt Vector Addresses
summarizes the reset and interrupt sources and vector
COPEN
Control
PIRQ
MOR
Bit
—
—
—
—
—
—
—
(2)
(1)
Interrupts
Hardware
Global
Mask
I bit
I bit
I bit
I bit
I bit
—
—
MC68HC705JJ7 • MC68HC705JP7 — REV 4
Software
TOFE bit
IRQE bit
OCIE bit
CPIE bit
RTIE bit
TOIE bit
SPIE bit
ICIE bit
Local
Mask
—
—
(1 = Highest)
Same priority
as instruction
Priority
1
2
3
4
5
6
$1FFC–$1FFD
$1FFE–$1FFF
$1FFA–$1FFB
$1FF8–$1FF9
$1FF6–$1FF7
$1FF4–$1FF5
$1FF2–$1FF3
Address
MOTOROLA
Vector