AM79C976 Advanced Micro Devices, AM79C976 Datasheet - Page 150

• Manufacturer Part Number: AM79C976
• Description: PCnet-PRO 10/100 Mbps PCI Ethernet Controller
• Manufacturer: Advanced Micro Devices

FLASH_ADDR: Flash Address Register
Offset 198h
Offset 19Ch
150
30-24
23-0
15-8
7-0
Bit
Bit
31
FLASH_DATA
FLASH_
LAAINC
Name
ADDR
Name
RES
RES
Lower Address Auto Increment. When the LAAINC bit is set to 1, the low-order 16-bit portion of the
Flash Address Register will automatically increment by one after a read or write access to the Flash
Data Register. When the low-order 16-bit portion of the Flash Address reaches FFFFh and
LAAINC is set to 1, the low-order 16-bit portion of the Flash Address will roll over to 0000h. When
the LAAINC bit is set to 0, the Flash Address Register will not be affected in any way after an
access to the Flash Data Register.
This bit is an alias of BCR29, bit 14.
Reserved locations. Written as zeros and read as undefined.
Flash Address. This field selects the byte of the external Flash/ROM device that will be accessed
when the Flash Data Register is accessed.
This field is an alias of BCR29, bits [7:0] concatenated with BCR28, bits [15:0].
Reserved locations. Written as zeros and read as undefined.
Flash Data. This field contains data written to or read from the external Flash/ROM device. When
the host CPU writes to this register, the contents of this field are written to the external Flash device
at the location selected by the Flash Address Register. When the host CPU reads this register, the
Am79C976 device first reads the location in the Flash device selected by the Flash Address
Register, then returns the value read in this field.
Table 55. FLASH_ADDR: Flash Address Register
Table 56. FLASH_DATA: Flash Data Register
P R E L I M I N A R Y
Am79C976
The contents of this register are cleared to 0 when the
RST pin is asserted. The register is not cleared at the
start of a serial EEPROM read operation or after a se-
rial EEPROM read error.
The contents of this register are cleared to 0 when the
RST pin is asserted. The register is not cleared at the
start of a serial EEPROM read operation or after a se-
rial EEPROM read error.
This register is an alias of BCR30.
Description
Description
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