AM79C976 Advanced Micro Devices, AM79C976 Datasheet - Page 70

• Manufacturer Part Number: AM79C976
• Description: PCnet-PRO 10/100 Mbps PCI Ethernet Controller
• Manufacturer: Advanced Micro Devices

data field and FCS field in the IEEE 802.3 frame. FCS
is always added if the frame is padded, regardless of
the state of DXMTFCS (CSR15, bit 3) or ADD_FCS
(TMD1, bit 29). The transmit frame will be padded by
bytes with the value of 00H. The default value of
APAD_XMT is 0 after H_RESET, which will disable au-
tomatic pad generation.
If automatic pad generation is disabled, the software is
responsible for insuring that the minimum frame size
requirement is met. The hardware can reliably transmit
frames ranging in size from 16 to 65536 octets.
It is the responsibility of upper layer software to cor-
rectly define the actual length/type field contained in
.
The 544 bit count is derived from the following:
At the point that FCS is to be appended, the transmitted
frame should contain:
A minimum length transmit frame from the Am79C976
controller, therefore, will be 576 bits, after the FCS is
appended.
Automatic generation and transmission of FCS for a
transmit frame depends on the value of DXMTFCS
(CSR15, bit 3). If DXMTFCS is cleared to 0, the trans-
mitter will generate and append the FCS to the trans-
mitted frame. If the transmitter modifies the frame data
because of automatic padding or VLAN tag manipula-
tion, the FCS will be appended by the Am79C976 con-
troller regardless of the state of DXMTFCS or
ADD_FCS (TMD1, bit 29). Note that the calculated
FCS is transmitted most significant bit first. The default
value of DXMTFCS is 0 after H_RESET.
70
Preamble/SFD + (Min Frame Size - FCS)
64 + (512-32) = 544 bits
Minimum frame size (excluding preamble/SFD,
including FCS)
Preamble/SFD size 8 bytes
FCS size
1010....1010
Preamble
Bits
56
10101011
SFD
Bits
8
64 bytes
4 bytes
Destination
Address
Bytes
6
512 bits
64 bits
32 bits
P R E L I M I N A R Y
Am79C976
Address
Source
Bytes
6
the message to correspond to the total number of LLC
Data bytes encapsulated in the frame (length/type field
as defined in the IEEE 802.3 standard). The length
value contained in the message is not used by the
Am79C976 controller to compute the actual number of
pad bytes to be inserted. The Am79C976 controller will
append pad bytes dependent on the actual number of
bits transmitted onto the network. Once the last data
byte of the frame has completed, prior to appending the
FCS, the Am79C976 controller will check to ensure that
544 bits have been transmitted. If not, pad bytes are
added to extend the frame size to this value, and the
FCS is then added. See Figure 3030.
When DXMTFCS is set to 1, the ADD_FCS (TMD1, bit
29) allows the automatic generation and transmission
of FCS on a frame-by-frame basis. When DXMTFCS is
set to 1, a valid FCS field is appended only to those
frames whose TX descriptors have their ADD_FCS bits
set to 1. If a frame is split into more than one buffer, the
ADD_FCS bit is ignored in all descriptors except for the
first.
The Am79C976 transmitter detects the following error
conditions and increments the appropriate error
counters when they occur:
Late collision errors can only occur when the device is
operating in half-duplex mode. Loss of carrier and
transmit FIFO underflow errors are possible when the
device is operating in half- or full-duplex mode.
When an error occurs in the middle of a multi-buffer
frame transmission, the appropriate error counter will
be incremented, and the transmission will be aborted
with an inverted FCS field appended to the frame. The
OWN bit(s) in the current and subsequent descriptor(s)
will be cleared until the STP (the next frame) is found.
Length/
Bytes
Type
2
Data
LLC
46 – 1500
Bytes
Pad
Bytes
FCS
4
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