AM79C976 Advanced Micro Devices, AM79C976 Datasheet - Page 87

• Manufacturer Part Number: AM79C976
• Description: PCnet-PRO 10/100 Mbps PCI Ethernet Controller
• Manufacturer: Advanced Micro Devices

1. FORCE_FD (CMD3, bit 12),
2. FORCE_SPEED (CTRL2, bits 18-16),
3. FORCE_LINK_STAT (CMD3, bit 11), and
4. Force Pause Ability (FPA, FLOW_CONTROL, bit
These bits set up the duplex mode, speed, and flow
control ability in the MAC and put the MAC into the Link
Pass state.
Regulating Network Traffic
The Am79C976 device provides two hardware mecha-
nisms for regulating network traffic: 802.3x Flow Con-
trol and collision-based back pressure. 802.3x Flow
Control applies to full-duplex operation only, while back
pressure applies to half-duplex operation only. 802.3x
Flow Control works by sending and receiving MAC
Control PAUSE frames, which cause the receiving sta-
tion to postpone transmissions for a time determined by
the contents of the PAUSE frame. Back pressure forces
collisions to occur when other nodes attempt to trans-
mit, thereby preventing other nodes from transmitting
for periods of times determined by the back-off algo-
rithm.
The format of a MAC Control Pause frame is shown in
Table 12.
When a network station that supports IEEE 802.3x
Flow Control receives a pause frame, it must suspend
transmissions after the end of any frame that was being
transmitted when the pause frame arrived. The length
of time for which the station must suspend transmis-
sions is given in the request_operand field of the pause
frame. This pause time is given in units of slot times.
For 10-Mbps and 100-Mbps 802.3 networks, one slot
time is 512 bit times. The request_operand field is in-
8/01/00
Numbers
Octet
13-14
15-16
17-18
19-60
61-64
20).
Table 12. MAC Control Pause Frame Format
7-12
1-6
Destination
Address
Source Address
Length/Type
MAC Control
Opcode
Request_operand
Pad
FCS
Field Name
01-80-C2-00-00-01
Sender’s physical
address
88-08
00-01
Pause time measured in
slot times
Zeros
FCS
Value
P R E L I M I N A R Y
Am79C976
terpreted as Big-Endian data--octet 17 is the most sig-
nificant byte and octet 18 is the least significant byte.
The Am79C976 device supports collision-based back
pressure for congestion control when the device is op-
erating in half-duplex mode. Back pressure is enabled
when the device is operating in half duplex mode and
either the Flow Control Command bit (FCCMD,
FLOW_CONTROL, bit 16) is set or the FC Pin Enable
bit (FCPEN, FLOW_CONTROL, bit 17) is set and the
FC pin is asserted.
When the MAC begins receiving a frame that passes
the address matching criteria and if back pressure is
enabled, the MAC will intentionally cause a collision by
transmitting a “phantom” frame consisting of a continu-
ous stream of alternating 1s and 0s. The length of the
phantom frame is 568 bits so that it will be interpreted
as a runt frame.
Back pressure does not affect the transmission of a
frame. The MAC will only force a collision when it be-
gins to receive a new frame.
The generation of a Back-Pressure collision causes the
XmtBackPressure MIB Counter to increment.
Traffic regulation can be controlled either by external
hardware or by CPU commands. Traffic regulation is af-
fected by the following:
The duplex mode affects the type of traffic regulation
that is used. In full-duplex mode the FC pin and the
FCPEN, FCCMD, and FIXP bits control the transmis-
sion of pause frames. In half-duplex mode the same pin
and bits control the assertion of back pressure. Also, in
half-duplex mode the Am79C976 device does not
respond to received pause frames.
The Am79C976 device includes support for two styles
of full-duplex flow control. In one style, which is similar
to an XON-XOFF protocol, a pause frame whose
request_operand field (bytes 17 and 18) contains
0FFFFh is sent to prevent the link partner from transmit-
ting. Later, a pause frame whose request_operand field
contains 0 is sent to allow the link partner to resume
transmissions. This style of flow control is selected by
clearing the Fixed Length Pause bit (FIXP) to 0.
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