AM79C976 Advanced Micro Devices, AM79C976 Datasheet - Page 204

• Manufacturer Part Number: AM79C976
• Description: PCnet-PRO 10/100 Mbps PCI Ethernet Controller
• Manufacturer: Advanced Micro Devices

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LEDDIS
100E
RES
MPSE
and allowed to float high whenev-
er the OR of the enabled signals
is false (i.e., the LED output will
be an Open Drain output and the
output value will be the inverse of
the LEDOUT status bit).
When this bit has the value 1, the
LED pin will be driven to a HIGH
level whenever the OR of the en-
abled signals is true. The LED pin
will be driven to a LOW level
whenever the OR of the enabled
signals is false (i.e., the LED out-
put will be a Totem Pole output
and the output value will be the
same polarity as the LEDOUT
status bit).
The setting of this bit will not ef-
fect the polarity of the LEDOUT
bit for this register.
Read/Write accessible. LEDPOL
is cleared by H_RESET and is
not affected by S_RESET or set-
ting the STOP bit.
disable the LED output. When
LEDDIS has the value 1, then the
LED output will always be dis-
abled. When LEDDIS has the val-
ue 0, then the LED output value
will be governed by the LEDOUT
and LEDPOL values.
Read/Write accessible. LEDDIS
is cleared by H_RESET and is
not affected by S_RESET or set-
ting the STOP bit.
is set to 1, a value of 1 is passed
to the LEDOUT bit in this register
when the Am79C976 controller is
operating at 100 Mbps mode.
Read/Write accessible. 100E is
set to 1 by H_RESET and is not
affected by S_RESET or setting
the STOP bit.
read as zeros.
When this bit is set to 1, a value
of 1 is passed to the LEDOUT bit
LED Disable. This bit is used to
100 Mbps Enable. When this bit
Reserved locations. Written and
Magic Packet Status Enable.
P R E L I M I N A R Y
Am79C976
8
7
6
5
FDLSE
PSE
LNKSE
RCVME
Read/Write accessible. MPSE is
cleared by H_RESET and is not
affected by S_RESET or setting
the STOP bit.
Read/Write accessible. FDLSE is
cleared by H_RESET and is not
affected by S_RESET or setting
the STOP bit.
Read/Write accessible. PSE is
set to 1 by H_RESET and is not
affected by S_RESET or setting
the STOP bit.
Read/Write accessible. LNKSE is
cleared by H_RESET and is not
affected by S_RESET or setting
the STOP bit.
in this register when Magic Pack-
et frame mode is enabled and a
Magic Packet frame is detected
on the network.
Full-Duplex Link Status Enable.
Indicates the Full-Duplex Link
Test Status. When this bit is set,
a value of 1 is passed to the LED-
OUT signal when the Am79C976
controller is functioning in a Link
Pass state and full-duplex opera-
tion
Am79C976 controller is not func-
tioning in a Link Pass state with
full-duplex operation being en-
abled, a value of 0 is passed to
the LEDOUT signal.
this bit is set, the LED illumination
time is extended for each new oc-
currence of the enabled function
for this LED output. A value of 0
disables the pulse stretcher.
is set, a value of 1 will be passed
to the LEDOUT bit in this register
in Link Pass state.
When this bit is set, a value of 1 is
passed to the LEDOUT bit in this
register when there is receive ac-
tivity on the network that has
passed the address match func-
tion for this node. All address
matching modes are included:
Pulse Stretcher Enable. When
Link Status Enable. When this bit
Receive Match Status Enable.
is
enabled.
When
8/01/00
the