DS26524GA4 Maxim Integrated, DS26524GA4 Datasheet - Page 56
DS26524GA4
Manufacturer Part Number
DS26524GA4
Description
Network Controller & Processor ICs
Manufacturer
Maxim Integrated
Datasheet
1.DS26524GA4.pdf
(273 pages)
Specifications of DS26524GA4
Part # Aliases
90-26524-GA4
- Current page: 56 of 273
- Download datasheet (2Mb)
Table 8-23
Table 8-23. Registers Related to Maintenance and Alarms
Receive Real-Time Status Register 1 (RRTS1)
Receive Interrupt Mask Register 1(RIM1)
Receive Latched Status Register 2 (RLS2)
Receive Real-Time Status Register 3 (RRTS3)
Receive Latched Status Register 3 (RLS3)
Receive Interrupt Mask Register 3 (RIM3)
Receive Interrupt Mask Register 4 (RIM4)
Receive Latched Status Register 7 (RLS7)
Receive Interrupt Mask Register 7 (RIM7)
Transmit Latched Status Register 1 (TLS1)
Transmit Latched Status Register 3
(Synchronizer) (TLS3)
Receive DS0 Monitor Register (RDS0M)
Error-Counter Configuration Register (ERCNT)
Line Code Violation Count Register 1
(LCVCR1)
Line Code Violation Count Register 2
(LCVCR2)
Path Code Violation Count Register 1
(PCVCR1)
Path Code Violation Count Register 2
(PCVCR2)
Frames Out of Sync Count Register 1
(FOSCR1)
Frames Out of Sync Count Register 2
(FOSCR2)
E-Bit Count Register 1 (E1EBCR1)
E-Bit Count Register 2 (E1EBCR2)
Note: The addresses shown are for Framer 1. Addresses for Framers 2 to 4 can be calculated using the following: Framer n = (Framer 1
address + (n - 1) x 200h); where n = 2 to 4 for Framers 2 to 4.
shows some of the registers related to maintenance and alarms.
REGISTER
ADDRESSES
56 of 273
FRAMER
0B0h
0A0h
0B2h
0A2h
0A3h
0A6h
091h
092h
096h
190h
192h
060h
086h
050h
051h
052h
053h
054h
055h
056h
057h
Real-time receive status 1.
Real-time interrupt mask 1.
Real-time latched status 2.
Real-time receive status 2.
Real-time latched status 3.
Real-time interrupt mask 3.
Real-time interrupt mask 3.
Real-time latched status 7.
Real-time interrupt mask 7.
Loss of transmit clock status, TPDV, etc.
Loss of frame status.
Receive DS0 monitor.
Configuration of the error counters.
Line code violation counter 1.
Line code violation counter 2.
Receive path code violation counter 1.
Receive path code violation counter 2.
Receive frame out of sync counter 1
Receive frame out of sync counter 2
E-bit count register 1.
E-bit count register 2.
FUNCTION
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