PCM18XK1 Microchip Technology, PCM18XK1 Datasheet - Page 96

MODULE PROC PIC18F8680,6680,8565

PCM18XK1

Manufacturer Part Number
PCM18XK1
Description
MODULE PROC PIC18F8680,6680,8565
Manufacturer
Microchip Technology
Datasheet

Specifications of PCM18XK1

Accessory Type
Processor Module
Lead Free Status / RoHS Status
Not applicable / Not applicable
For Use With/related Products
ICE2000
For Use With
ICE2000 - EMULATOR MPLAB-ICE 2000 POD
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
PIC18F6585/8585/6680/8680
REGISTER 6-1:
DS30491C-page 94
bit 7
bit 6
bit 5-4
bit 3-2
bit 1-0
MEMCON REGISTER
EBDIS: External Bus Disable bit
1 = External system bus disabled, all external bus drivers are mapped as I/O ports
0 = External system bus enabled and I/O ports are disabled
Unimplemented: Read as ‘0’
WAIT<1:0>: Table Reads and Writes Bus Cycle Wait Count bits
11 = Table reads and writes will wait 0 T
10 = Table reads and writes will wait 1 T
01 = Table reads and writes will wait 2 T
00 = Table reads and writes will wait 3 T
Unimplemented: Read as ‘0’
WM<1:0>: TBLWT Operation with 16-bit Bus bits
1x = Word Write mode: LSB and MSB word output, WRH active when MSB written
01 = Byte Select mode: TABLAT data copied on both MS and LS Byte, WRH and (UB or LB)
00 = Byte Write mode: TABLAT data copied on both MS and LS Byte, WRH or WRL will activate
bit 7
Legend:
R = Readable bit
- n = Value at POR
EBDIS
Note:
R/W-0
Note 1: This bit is ignored when device is accessing external memory either to fetch an
will activate
(1)
The MEMCON register is held in Reset in Microcontroller mode.
instruction or perform TBLRD/TBLWT.
U-0
WAIT1
R/W-0
W = Writable bit
‘1’ = Bit is set
(1)
WAIT0
R/W-0
CY
CY
CY
CY
U-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
 2004 Microchip Technology Inc.
x = Bit is unknown
R/W-0
WM1
R/W-0
WM0
bit 0

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