STEVAL-IFS006V1 STMicroelectronics, STEVAL-IFS006V1 Datasheet - Page 59

• Manufacturer Part Number: STEVAL-IFS006V1
• Description: BOARD EVAL 8BIT MICRO + TDE1708
• Manufacturer: STMicroelectronics

Specifications of STEVAL-IFS006V1

• Design Resources: STEVAL-IFS006V1 Bill of Material
• Sensor Type: Proximity
• Interface: I²C
• Voltage - Supply: 6 V ~ 48 V
• Embedded: Yes, MCU, 8-Bit
• Utilized Ic / Part: ST7FLITEUS5, TDE1708
• Processor To Be Evaluated: ST7LITEUS5
• Data Bus Width: 8 bit
• Operating Supply Voltage: 6 V to 48 V
• Silicon Manufacturer: ST Micro
• Silicon Core Number: TDE1708DFT
• Kit Application Type: Sensing - Touch / Proximity
• Application Sub Type: Proximity Switch
• Kit Contents: Board
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Sensitivity: -
• Sensing Range: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 497-6403; STEVAL-IFS006V1

ST7LITEUS2, ST7LITEUS5
9
9.1
9.2
9.2.1
Note:
1
2
I/O ports
Introduction
The I/O port offers different functional modes:
●
and for specific pins:
●
●
An I/O port contains up to 6 pins. Each pin (except PA3/RESET) can be programmed
independently as digital input (with or without interrupt generation) or digital output.
Functional description
Each port has 2 main registers:
●
●
and one optional register:
●
Each I/O pin may be programmed using the corresponding register bits in the DDR and OR
registers: bit X corresponding to pin X of the port. The same correspondence is used for the
DR register.
The following description takes into account the OR register, (for specific ports which do not
provide this register refer to the I/O Port Implementation section). The generic I/O block
diagram is shown in
Input modes
The input configuration is selected by clearing the corresponding DDR register bit.
In this case, reading the DR register returns the digital value applied to the external I/O pin.
Different input modes can be selected by software through the OR register.
Writing the DR register modifies the latch value but does not affect the pin status.
PA3 cannot be configured as input.
External interrupt function
When an I/O is configured as Input with Interrupt, an event on this I/O can generate an
external interrupt request to the CPU.
Each pin can independently generate an interrupt request. The interrupt sensitivity is
independently programmable using the sensitivity bits in the EICR register.
External interrupts are hardware interrupts. Fetching the corresponding interrupt vector
automatically clears the request latch. Changing the sensitivity of a particular external
interrupt clears this pending interrupt. This can be used to clear unwanted pending
interrupts.
Transfer of data through digital inputs and outputs
External interrupt generation
Alternate signal input/output for the on-chip peripherals.
Data register (DR)
Data Direction register (DDR)
Option register (OR)
Figure
28.
I/O ports
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