STEVAL-IFS006V1 STMicroelectronics, STEVAL-IFS006V1 Datasheet - Page 70

• Manufacturer Part Number: STEVAL-IFS006V1
• Description: BOARD EVAL 8BIT MICRO + TDE1708
• Manufacturer: STMicroelectronics

Specifications of STEVAL-IFS006V1

• Design Resources: STEVAL-IFS006V1 Bill of Material
• Sensor Type: Proximity
• Interface: I²C
• Voltage - Supply: 6 V ~ 48 V
• Embedded: Yes, MCU, 8-Bit
• Utilized Ic / Part: ST7FLITEUS5, TDE1708
• Processor To Be Evaluated: ST7LITEUS5
• Data Bus Width: 8 bit
• Operating Supply Voltage: 6 V to 48 V
• Silicon Manufacturer: ST Micro
• Silicon Core Number: TDE1708DFT
• Kit Application Type: Sensing - Touch / Proximity
• Application Sub Type: Proximity Switch
• Kit Contents: Board
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Sensitivity: -
• Sensing Range: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 497-6403; STEVAL-IFS006V1

On-chip peripherals
Table 26.
70/136
Address
(Hex.)
0C
0B
Lite Timer Input Capture register (LTICR)
Reset value: 0000 0000 (00h)
Lite timer register map and reset values
LTCSR
Reset value
LTICR
Reset value
Register label
ICR7
7
Bit 7:0 ICR[7:0] Input capture value
Bit 2 WDGRF Force Reset/ Reset Status Flag
Bit 1 WDGE Watchdog Enable
Bit 0 WDGD Watchdog Reset Delay
ICR6
This bit is used in two ways: it is set by software to force a watchdog reset. It is set
by hardware when a watchdog reset occurs and cleared by hardware or by
software. It is cleared by hardware only when an LVD reset occurs. It can be cleared
by software after a read access to the LTCSR register.
0: No watchdog reset occurred.
1: Force a watchdog reset (write), or, a watchdog reset occurred (read).
This bit is set and cleared by software.
0: Watchdog disabled
1: Watchdog enabled
This bit is set by software. It is cleared by hardware at the end of each t
0: Watchdog reset not delayed
1: Watchdog reset delayed
These bits are read by software and cleared by hardware after a reset. If the ICF bit
in the LTCSR is cleared, the value of the 8-bit up-counter will be captured when a
rising or falling edge occurs on the LTIC pin.
ICR7
ICIE
7
0
0
ICR5
ICR6
ICF
6
0
0
ICR5
ICR4
TB
5
0
0
Read only
TBIE
ICR4
4
0
0
ICR3
ICR3
TBF
3
0
0
ICR2
ST7LITEUS2, ST7LITEUS5
WDGRF
ICR2
2
x
0
ICR1
WDGE
ICR1
1
0
0
WDG
ICR0
WDGD
ICR0
0
period.
0
0
0