AT91RM3400-DK Atmel, AT91RM3400-DK Datasheet - Page 137
AT91RM3400-DK
Manufacturer Part Number
AT91RM3400-DK
Description
KIT DEV FOR AT91RM3400
Manufacturer
Atmel
Series
AT91SAM Smart ARMr
Type
MCUr
Datasheets
1.AT91RM3400-DK.pdf
(461 pages)
2.AT91RM3400-DK.pdf
(2 pages)
3.AT91RM3400-DK.pdf
(25 pages)
Specifications of AT91RM3400-DK
Contents
Evaluation Board, Software and Documentation
Processor To Be Evaluated
AT91RM3400
Data Bus Width
32 bit
Interface Type
RS-232, USB
For Use With/related Products
AT91RM3400
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
- Current page: 137 of 461
- Download datasheet (6Mb)
Clock Switching Details
Master Clock Switching
Timings
Table 30. Clock Switching Timings (Worst Case)
1790A–ATARM–11/03
To
Main Clock
SLCK
PLLA Clock
PLLB Clock
From
PLLBCOUNT x SLCK +
PLLACOUNT x SLCK +
0.5 x Main Clock +
0.5 x Main Clock +
0.5 x Main Clock +
2.5 x PLLA Clock
2.5 x PLLB Clock
Main Clock
4.5 x SLCK
4 x SLCK +
4 x SLCK +
Table 30 gives the worst case timing required for the Master Clock to switch from one
selected clock to another one. This is in the event that the prescaler is de-activated.
When the prescaler is activated, an additional time of 64 clock cycles of the new
selected clock has to be added.
–
PLLACOUNT x SLCK
PLLBCOUNT x SLCK
2.5 x PLLA Clock +
2.5 x PLLB Clock +
2.5 x Main Clock
4 x SLCK +
5 x SLCK +
5 x SLCK +
SLCK
–
PLLB COUNT x SLCK
2.5 x PLLA Clock +
3 x PLLA Clock +
3 x PLLA Clock +
3 x PLLB Clock +
1.5 x PLLB Clock
1 x Main Clock
PLLA Clock
4 x SLCK +
4 x SLCK +
4 x SLCK +
5 x SLCK
AT91RM3400
PLLACOUNT x SLCK
2.5 x PLLB Clock +
3 x PLLB Clock +
3 x PLLB Clock +
3 x PLLA Clock +
1.5 x PLLA Clock
1 x Main Clock
PLLB Clock
4 x SLCK +
4 x SLCK +
4 x SLCK +
5 x SLCK
137
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