C8051F700DK Silicon Laboratories Inc, C8051F700DK Datasheet - Page 11
![DEV KIT FOR C8051F700](/photos/9/23/92340/c8051f700dk_sml.jpg)
C8051F700DK
Manufacturer Part Number
C8051F700DK
Description
DEV KIT FOR C8051F700
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheets
1.C8051F700-TB.pdf
(1 pages)
2.C8051F700-TB.pdf
(306 pages)
3.C8051F700-TB.pdf
(18 pages)
Specifications of C8051F700DK
Contents
Board, Cables, CD, Debugger, Power Supply
Processor To Be Evaluated
C8051F7x
Processor Series
C8051F7xx
Interface Type
USB
Operating Supply Voltage
3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
C8051F7xx
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1635
- Current page: 11 of 306
- Download datasheet (2Mb)
C8051F70x/71x
List of Tables
Table 2.1. Product Selection Guide ......................................................................... 27
Table 3.1. Pin Definitions for the C8051F70x/71x ................................................... 28
Table 4.1. TQFP-64 Package Dimensions .............................................................. 37
Table 4.2. TQFP-64 PCB Land Pattern Dimensions ............................................... 38
Table 5.1. TQFP-48 Package Dimensions .............................................................. 39
Table 5.2. TQFP-48 PCB Land Pattern Dimensions ............................................... 40
Table 6.1. QFN-48 Package Dimensions ................................................................ 41
Table 6.2. QFN-48 PCB Land Pattern Dimensions ................................................. 42
Table 7.1. QFN-32 Package Dimensions ................................................................ 43
Table 7.2. QFN-32 PCB Land Pattern Dimensions ................................................. 44
Table 8.1. QFN-24 Package Dimensions ................................................................ 45
Table 8.2. QFN-24 PCB Land Pattern Dimensions ................................................. 46
Table 9.1. Absolute Maximum Ratings .................................................................... 47
Table 9.2. Global Electrical Characteristics ............................................................. 48
Table 9.3. Port I/O DC Electrical Characteristics ..................................................... 49
Table 9.4. Reset Electrical Characteristics .............................................................. 49
Table 9.5. Internal Voltage Regulator Electrical Characteristics ............................. 50
Table 9.6. Flash Electrical Characteristics .............................................................. 50
Table 9.7. Internal High-Frequency Oscillator Electrical Characteristics ................. 50
Table 9.8. Capacitive Sense Electrical Characteristics ........................................... 51
Table 9.9. EEPROM Electrical Characteristics ........................................................ 52
Table 9.10. ADC0 Electrical Characteristics ............................................................ 52
Table 9.11. Power Management Electrical Characteristics ..................................... 53
Table 9.12. Temperature Sensor Electrical Characteristics .................................... 53
Table 9.13. Voltage Reference Electrical Characteristics ....................................... 53
Table 9.14. Comparator Electrical Characteristics .................................................. 54
Table 15.1. Gain Setting vs. Maximum Capacitance and Conversion Time ........... 81
Table 15.2. Operation with Auto-scan and Accumulate .......................................... 85
Table 16.1. CIP-51 Instruction Set Summary ........................................................ 100
Table 18.1. AC Parameters for External Memory Interface ................................... 126
Table 18.2. EMIF Pinout (C8051F700/1/2/3/8/9 and C8051F710/1) ..................... 127
Table 20.1. Special Function Register (SFR) Memory Map .................................. 131
Table 20.2. Special Function Registers ................................................................. 132
Table 21.1. Interrupt Summary .............................................................................. 139
Table 22.1. Flash Security Summary .................................................................... 150
Table 28.1. Port I/O Assignment for Analog Functions ......................................... 183
Table 28.2. Port I/O Assignment for Digital Functions ........................................... 184
Table 28.3. Port I/O Assignment for External Event Trigger Functions ................. 184
Table 29.1. Example 16-bit CRC Outputs ............................................................. 212
Table 29.2. Example 32-bit CRC Outputs ............................................................. 213
Table 30.1. SMBus Clock Source Selection .......................................................... 223
Table 30.2. Minimum SDA Setup and Hold Times ................................................ 224
Table 30.3. Sources for Hardware Changes to SMB0CN ..................................... 228
Rev. 1.0
11
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