C8051F700DK Silicon Laboratories Inc, C8051F700DK Datasheet - Page 198

DEV KIT FOR C8051F700

C8051F700DK

Manufacturer Part Number
C8051F700DK
Description
DEV KIT FOR C8051F700
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheets

Specifications of C8051F700DK

Contents
Board, Cables, CD, Debugger, Power Supply
Processor To Be Evaluated
C8051F7x
Processor Series
C8051F7xx
Interface Type
USB
Operating Supply Voltage
3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
C8051F7xx
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1635
C8051F70x/71x
SFR Definition 28.13. P1MDIN: Port 1 Input Mode
SFR Address = 0xF2; SFR Page = F
SFR Definition 28.14. P1MDOUT: Port 1 Output Mode
SFR Address = 0xA5; SFR Page = F
198
Note: On C8051F716 and C8051F717 devices, P1.7 will default to analog mode. If the P1MDIN register is written
Name
Reset
Name
Reset
7:0
7:0 P1MDOUT[7:0] Output Configuration Bits for P1.7–P1.0 (respectively).
Bit
Bit
Type
Type
Bit
Bit
on the C8051F716 and C8051F717 devices, P1.7 should always be configured as analog.
P1MDIN[7:0]
Name
Name
1*
7
7
0
Analog Configuration Bits for P1.7–P1.0 (respectively).
Port pins configured for analog mode have their weak pullup, digital driver, and
digital receiver disabled.
0: Corresponding P1.n pin is configured for analog mode.
1: Corresponding P1.n pin is not configured for analog mode.
These bits are ignored if the corresponding bit in register P1MDIN is logic 0.
0: Corresponding P1.n Output is open-drain.
1: Corresponding P1.n Output is push-pull.
6
1
6
0
5
1
5
0
Rev. 1.0
P1MDOUT[7:0]
4
1
4
0
P1MDIN[7:0]
R/W
R/W
Function
Function
3
1
3
0
2
1
2
0
1
1
1
0
0
1
0
0

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