C8051F700DK Silicon Laboratories Inc, C8051F700DK Datasheet - Page 196
![DEV KIT FOR C8051F700](/photos/9/23/92340/c8051f700dk_sml.jpg)
C8051F700DK
Manufacturer Part Number
C8051F700DK
Description
DEV KIT FOR C8051F700
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheets
1.C8051F700-TB.pdf
(1 pages)
2.C8051F700-TB.pdf
(306 pages)
3.C8051F700-TB.pdf
(18 pages)
Specifications of C8051F700DK
Contents
Board, Cables, CD, Debugger, Power Supply
Processor To Be Evaluated
C8051F7x
Processor Series
C8051F7xx
Interface Type
USB
Operating Supply Voltage
3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
C8051F7xx
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1635
- Current page: 196 of 306
- Download datasheet (2Mb)
C8051F70x/71x
SFR Definition 28.9. P0MDOUT: Port 0 Output Mode
SFR Address = 0xA4; SFR Page = F
SFR Definition 28.10. P0SKIP: Port 0 Skip
SFR Address = 0xD4; SFR Page = F
196
Name
Reset
Name
Reset
7:0 P0MDOUT[7:0] Output Configuration Bits for P0.7–P0.0 (respectively).
7:0
Bit
Bit
Type
Type
Bit
Bit
P0SKIP[7:0]
Name
Name
7
0
7
0
Port 0 Crossbar Skip Enable Bits.
These bits select Port 0 pins to be skipped by the Crossbar Decoder. Port pins
used for analog, special functions or GPIO should be skipped by the Crossbar.
0: Corresponding P0.n pin is not skipped by the Crossbar.
1: Corresponding P0.n pin is skipped by the Crossbar.
These bits are ignored if the corresponding bit in register P0MDIN is logic 0.
0: Corresponding P0.n Output is open-drain.
1: Corresponding P0.n Output is push-pull.
6
0
6
0
5
0
5
0
Rev. 1.0
P0MDOUT[7:0]
4
0
4
0
P0SKIP[7:0]
R/W
R/W
Function
Function
3
0
3
0
2
0
2
0
1
0
1
0
0
0
0
0
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