DEMO9S08JM16 Freescale Semiconductor, DEMO9S08JM16 Datasheet - Page 241

• Manufacturer Part Number: DEMO9S08JM16
• Description: BOARD DEMO FOR JM16 FAMI
• Manufacturer: Freescale Semiconductor
• Type: MCUr

Specifications of DEMO9S08JM16

• Contents: Board with Daughter card, Cable, Documentation, Mini-AB USB Kit
• Processor To Be Evaluated: MC9S08JM16
• Data Bus Width: 8 bit
• Interface Type: USB
• Silicon Manufacturer: Freescale
• Core Architecture: HCS08
• Core Sub-architecture: HCS08
• Silicon Core Number: MC9S08
• Silicon Family Name: Flexis - S08JM
• Rohs Compliant: Yes
• For Use With/related Products: MC9S08JM16
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Freescale Semiconductor
Write:
Write:
Write:
Write:
Write:
Write:
After SPI master initiates transfer by checking that SPTEF = 1 and then writing data to SPIDH/L:
Data transmissions can be 8- or 16-bits long, and mode fault detection can be enabled for master mode in cases where
more than one SPI device might become a master at the same time. Also, some applications may utilize the receive data
buffer hardware match feature to trigger specific actions, such as when command data can be sent through the SPI or to
indicate the end of an SPI transmission.
Write:
Wait for SPRF, then read from SPIDH/L
Wait for SPTEF, then write to SPIDH/L
SPIxMH
SPIxDH
SPIxBR
SPIxML
SPIxC1
SPIxC2
SPIxDL
SPIxS
SPIxC1
SPIxC2
SPIxMH:SPIxML
SPIxC1
SPIxC2
SPIxBR
SPIxMH:SPIxML
Hardware Match Value
Module/interrupt enables and configuration
Additional configuration options.
Baud rate = (BUSCLK/SPPR[2:0])/SPR2[2:0]
SPRF
SPIE
SPMIE
Bit 15
Bit 15
Bit 7
Bit 7
SPIMODE
SPPR2
SPE
SPMF
Bit 14
Bit 14
Bit 6
Bit 6
Figure 15-2. SPI Module Quick Start
MC9S08JM16 Series Data Sheet, Rev. 2
to configure
to configure
to set
to configure
to set
to configure
to set
Module Initialization
Module Initialization (Slave):
SPTIE
SPTEF
SPPR1
Bit 13
Bit 13
Bit 5
Bit 5
Module Use:
MODFEN
MODF
MSTR
SPPR0
Bit 12
Bit 12
Bit 4
Bit 4
interrupts, set primary SPI options, slave mode select, and
system enable.
optional SPI features, hardware match interrupt enable,
and 8- or 16-bit data transmission length
hardware compare value that triggers SPMF (optional)
when value in receive data buffer equals this value.
interrupts, set primary SPI options, master mode select,
and system enable.
optional SPI features, hardware match interrupt enable,
and 8- or 16-bit data transmission length
baud rate
hardware compare value that triggers SPMF (optional)
when value in receive data buffer equals this value.
BIDIROE
CPOL
(Master):
Bit 11
Bit 11
Bit 3
Bit 3
CPHA
SPR2
Bit 10
Bit 10
Bit 2
Bit 2
Serial Peripheral Interface (S08SPI16V1)
SPISWAI
SSOE
SPR1
Bit 9
Bit 1
Bit 9
Bit 1
SPC0
SPR0
LSBFE
Bit 0
Bit 8
Bit 8
Bit 0
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