DEMO9S08JM16 Freescale Semiconductor, DEMO9S08JM16 Datasheet - Page 347

BOARD DEMO FOR JM16 FAMI

DEMO9S08JM16

Manufacturer Part Number
DEMO9S08JM16
Description
BOARD DEMO FOR JM16 FAMI
Manufacturer
Freescale Semiconductor
Type
MCUr

Specifications of DEMO9S08JM16

Contents
Board with Daughter card, Cable, Documentation, Mini-AB USB Kit
Processor To Be Evaluated
MC9S08JM16
Data Bus Width
8 bit
Interface Type
USB
Silicon Manufacturer
Freescale
Core Architecture
HCS08
Core Sub-architecture
HCS08
Silicon Core Number
MC9S08
Silicon Family Name
Flexis - S08JM
Rohs Compliant
Yes
For Use With/related Products
MC9S08JM16
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
18.4.3.8
This register can be read any time, but may be written only if ARM = 0, except bits 4 and 5 are hard-wired
to 0s.
Freescale Semiconductor
Reset
TRG[3:0]
TRGSEL
BEGIN
Field
3:0
W
7
6
R
TRGSEL
Trigger Type — Controls whether the match outputs from comparators A and B are qualified with the opcode
tracking logic in the debug module. If TRGSEL is set, a match signal from comparator A or B must propagate
through the opcode tracking logic and a trigger event is only signalled to the FIFO logic if the opcode at the match
address is actually executed.
0 Trigger on access to compare address (force)
1 Trigger if opcode at compare address is executed (tag)
Begin/End Trigger Select — Controls whether the FIFO starts filling at a trigger or fills in a circular manner until
a trigger ends the capture of information. In event-only trigger modes, this bit is ignored and all debug runs are
assumed to be begin traces.
0 Data stored in FIFO until trigger (end trace)
1 Trigger initiates data storage (begin trace)
Select Trigger Mode — Selects one of nine triggering modes, as described below.
0000 A-only
0001 A OR B
0010 A Then B
0011 Event-only B (store data)
0100 A then event-only B (store data)
0101 A AND B data (full mode)
0110 A AND NOT B data (full mode)
0111 Inside range: A ≤ address ≤ B
1000 Outside range: address < A or address > B
1001 – 1111 (No trigger)
0
7
Debug Trigger Register (DBGT)
= Unimplemented or Reserved
BEGIN
0
6
Table 18-5. DBGT Register Field Descriptions
Figure 18-8. Debug Trigger Register (DBGT)
MC9S08JM16 Series Data Sheet, Rev. 2
0
0
5
0
0
4
Description
TRG3
0
3
TRG2
0
2
TRG1
1
0
Development Support
TRG0
0
0
347

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