DEMO9S08JM16 Freescale Semiconductor, DEMO9S08JM16 Datasheet - Page 305

• Manufacturer Part Number: DEMO9S08JM16
• Description: BOARD DEMO FOR JM16 FAMI
• Manufacturer: Freescale Semiconductor
• Type: MCUr

Specifications of DEMO9S08JM16

• Contents: Board with Daughter card, Cable, Documentation, Mini-AB USB Kit
• Processor To Be Evaluated: MC9S08JM16
• Data Bus Width: 8 bit
• Interface Type: USB
• Silicon Manufacturer: Freescale
• Core Architecture: HCS08
• Core Sub-architecture: HCS08
• Silicon Core Number: MC9S08
• Silicon Family Name: Flexis - S08JM
• Rohs Compliant: Yes
• For Use With/related Products: MC9S08JM16
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

17.3.7
The ERRSTAT contains bits for each of the error sources within the USB module. Each of these bits
corresponds to its respective error enable bit (See
(ERRENB)”.) The result is OR'ed together and sent to the ERROR bit of the INTSTAT register. Once an
interrupt bit has been set, it may only be cleared by writing a 1 to the corresponding flag bit. Each bit is
set as soon as the error condition is detected. Thus, the interrupt will typically not correspond with the end
of a token being processed. This register will contain the value of 0x00 after reset.
Freescale Semiconductor
BUFERRF
BTOERRF
BTSERRF
USBRST
ERROR
Reset
Field
Field
1
0
7
5
4
W
R
BTSERRF
Error Interrupt Status Register (ERRSTAT)
ERROR Interrupt Enable — Setting this bit will enable ERROR interrupts.
0 Interrupt disabled
1 Interrupt enabled
USBRST Interrupt Enable — Setting this bit will enable USBRST interrupts.
0 Interrupt disabled
1 Interrupt enabled
Bit Stuff Error Flag — A bit stuff error has been detected. If set, the corresponding packet will be rejected due
to a bit stuff error.
0 No bit stuff error detected
1 Bit stuff error flag set
Buffer Error Flag — This bit is set if the USB module has requested a memory access to read a new BD but
has not been given the bus before the USB module needs to receive or transmit data. If processing a TX (IN
endpoint) transfer, this would cause a transmit data underflow condition. Or if processing an Rx (OUT endpoint)
transfer, this would cause a receive data overflow condition. This bit is also set if a data packet to or from the host
is larger than the buffer size that is allocated in the BD. In this case the data packet is truncated as it is put into
buffer memory.
0 No buffer error detected
1 A buffer error has occurred
Bus Turnaround Error Timeout Flag — This bit is set if a bus turnaround timeout error has occurred. The USB
module uses a bus turnaround timer to keep track of the amount of time elapsed between the token and data
phases of a SETUP or OUT TOKEN or the data and handshake phases of an IN TOKEN. If more than 16-bit
times are counted from the previous EOP before a transition from IDLE, a bus turnaround timeout error will occur.
0 No bus turnaround timeout error has been detected
1 A bus turnaround timeout error has occurred
0
7
Reserved
Figure 17-10. Error Interrupt Status Register (ERRSTAT)
0
6
Table 17-10. INTENB Field Descriptions (continued)
Table 17-11. ERRSTAT Field Descriptions
BUFERRF
MC9S08JM16 Series Data Sheet, Rev. 2
0
5
BTOERRF
Section 17.3.8, “Error Interrupt Enable Register
0
4
Description
Description
DFN8F
3
0
Universal Serial Bus Device Controller (S08USBV1)
CRC16F
0
2
CRC5F
0
1
PIDERRF
0
0
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