AD9549/PCBZ Analog Devices Inc, AD9549/PCBZ Datasheet - Page 50

• Manufacturer Part Number: AD9549/PCBZ
• Description: BOARD EVALUATION FOR AD9549
• Manufacturer: Analog Devices Inc

Specifications of AD9549/PCBZ

• Main Purpose: Timing, Clock Generator
• Embedded: No
• Utilized Ic / Part: AD9549
• Primary Attributes: 2 Inputs, 2 Outputs, VCO
• Secondary Attributes: CMOS, HSTL Output Logic, Graphical User Interface
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD9549
Addr
(Hex)
0x01A6
0x01A7
0x01A8
0x01A9
0x01AA
0x01AB
0x01AC
and
0x01AD
Reference selector/holdover
0x01C0
0x01C1
0x01C2
0x01C3
Doubler and output drivers
0x0200
0x0201
Monitor
0x0300
0x0301
0x0302
0x0303
0x0304
0x0305
0x0306
0x0307
0x0308
0x0309
0x030A
0x030B
0x030C
Type
M
M
M
M
M
M
M
M
M
RO
RO
RO
RO
1
Name
FTW0
(open-loop
frequency
tuning
word)
Phase
(open loop
only)
Automatic
control
Override
Averaging
window
Reference
validation
HSTL
driver
CMOS
driver
Status
IRQ status
IRQ mask
S1 pin
config
S2 pin
config
S3 pin
config
S4 pin
config
Control
Bit 7
Reserved
Reserved
REF?
REF?
REF?
REF?
Enable
REFA LOR
Reserved
Reserved
Reserved
Bit 6
PFD freq.
too high
REFA
valid
PFD freq.
too high
REFA
valid
REF? LOR
REF? LOR
REF? LOR
REF? LOR
Enable
REFA OOL
Reserved
Bit 5
PFD freq.
too low
REFA
LOR
PFD
freq. too
low
REFA
LOR
REFA
valid
REFB
valid
REF?
OOL
REF?
OOL
REF?
OOL
REF?
OOL
Enable
REFB
LOR
Rev. D | Page 50 of 76
DDS phase word, Bits[15:0]
Bit 4
Holdover
mode
Enable
line card
mode
Freq. est.
done
REFA OOL
Freq. est.
done
REFA OOL
Freq. est.
done
!REFA
valid
!REFB
valid
REF? not
valid
REF? not
valid
REF? not
valid
REF? not
valid
Enable
REFB OOL
OPOL
(polarity)
LSB: Register 0x01A6
FTW0, Bits[47:0]
Bit 3
Reserved
Enable
ref input
override
Ref
selected
Ref
selected
Phase
unlock
REFA
LOR
REFB
LOR
Phase
lock
Phase
lock
Phase
lock
Phase
lock
Validation timer, Bits[4:0]
FTW windowed average size, Bits[3:0]
Reserved
BIt 2
Automatic
selector
REF_AB
Free run
REFB valid
Free run
REFB valid
Ref
changed
Phase lock
!REFA LOR
!REFB LOR
Freq. lock
Freq. lock
Freq. lock
Freq. lock
Bit 1
Automatic
recover
Enable
holdover
override
Ph. lock
detected
REFB LOR
Phase lock
detected
REFB LOR
Leave
free run
Freq.
Unlock
REFA OOL
REFB OOL
Reserved
Reserved
Reserved
Reserved
Enable
phase
lock det.
HSTL output doubler,
Bits[1:0]
Bit 0
Automatic
holdover
Holdover
on/off
CMOS mux
Freq. lock
detected
REFB OOL
Freq. lock
detected
REFB OOL
Enter
free run
Freq. lock
!REFA OOL
!REFB OOL
IRQ
IRQ
IRQ
IRQ
Enable
frequency
lock det.
Default
(Hex)
0x00
0x00
0x00
Startup
cond.
Startup
cond.
0x00
0x00
0x00
0x00
0x00
0x05
0x00
N/A
N/A
0x00
0x00
0x00
0x00
0x00
0x00
0x60
0xE0
0x08
0x01
0xA2
0x00