EP9302-IQZ Cirrus Logic Inc, EP9302-IQZ Datasheet - Page 237

• Manufacturer Part Number: EP9302-IQZ
• Description: IC ARM9 SOC PROCESSOR 208LQFP
• Manufacturer: Cirrus Logic Inc
• Series: EP9r

Specifications of EP9302-IQZ

• Core Size: 16/32-Bit
• Core Processor: ARM9
• Speed: 200MHz
• Connectivity: EBI/EMI, Ethernet, I²C, IrDA, SPI, UART/USART, USB
• Peripherals: AC'97, DMA, I&sup2:S, LED, MaverickKey, POR, PWM, WDT
• Number Of I /o: 19
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 5x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 208-LQFP
• Controller Family/series: (ARM9)
• No. Of I/o's: 19
• Ram Memory Size: 16MB
• Cpu Speed: 200MHz
• No. Of Timers: 3
• No. Of Pwm Channels: 1
• Digital Ic Case Style: LQFP
• Embedded Interface Type: AC97, I2S, SPI, UART, USB
• Rohs Compliant: Yes
• Processor Series: EP93xx
• Core: ARM920T
• Data Bus Width: 32 bit
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: EDB9302A-Z
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1132 - KIT DEVELOPMENT EP9302 ARM9
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 598-1253

RasterSWLock
DS785UM1
31
15
Address: 0x8003_007C
Default: 0x0000_0000
Definition: Raster Software Lock register
Bit Descriptions:
30
14
29
13
28
12
PCLKEN:
EN:
RSVD:
SWLCK:
RSVD
27
11
26
10
Copyright 2007 Cirrus Logic
25
9
Pixel Clock Enable - Read/Write
The value written to this bit selects whether the pixel clock
or smart panel clock are output to the SPCLK pin, or not:
0 - SPCLK pin at high impedance
1 - PCLK or SCLK active on SPCLK pin
The PIFEN bit above selects PCLK vs. SCLK.
Enable Video State Machine - Read/Write
The value written to this bit selects whether the video state
machine is enabled, or not:
0 - Video state machine off
1 - Video state machine enabled
Reserved - Unknown during read
Software Lock - Read/Write
WRITE: Writing 0X0000_00AA to this register will unlock
all locked registers until the next block access.
READ: During a read operation, SWLCK[0] has this
meaning:
1 - Unlocked for current bus access
0 - Locked
The Read feature of the RasterSWLock register is used for
testing the locking function.
Raster Engine With Analog/LCD Integrated Timing and Interface
24
8
RSVD
23
7
22
6
21
5
20
4
SWLCK
19
3
EP93xx User’s Guide
18
2
17
1
16
7-55
0
7