EP9302-IQZ Cirrus Logic Inc, EP9302-IQZ Datasheet - Page 380

• Manufacturer Part Number: EP9302-IQZ
• Description: IC ARM9 SOC PROCESSOR 208LQFP
• Manufacturer: Cirrus Logic Inc
• Series: EP9r

Specifications of EP9302-IQZ

• Core Size: 16/32-Bit
• Core Processor: ARM9
• Speed: 200MHz
• Connectivity: EBI/EMI, Ethernet, I²C, IrDA, SPI, UART/USART, USB
• Peripherals: AC'97, DMA, I&sup2:S, LED, MaverickKey, POR, PWM, WDT
• Number Of I /o: 19
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 5x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 208-LQFP
• Controller Family/series: (ARM9)
• No. Of I/o's: 19
• Ram Memory Size: 16MB
• Cpu Speed: 200MHz
• No. Of Timers: 3
• No. Of Pwm Channels: 1
• Digital Ic Case Style: LQFP
• Embedded Interface Type: AC97, I2S, SPI, UART, USB
• Rohs Compliant: Yes
• Processor Series: EP93xx
• Core: ARM920T
• Data Bus Width: 32 bit
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: EDB9302A-Z
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1132 - KIT DEVELOPMENT EP9302 ARM9
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 598-1253

9
RXStsEnq
RXHdrLen
9-78
1/10/100 Mbps Ethernet LAN Controller
EP93xx User’s Guide
31
15
31
15
Address:
Chip Reset:
Soft Reset:
Definition:
Bit Descriptions:
Address:
30
14
30
14
RSVD
29
13
29
13
RSVD
28
12
28
12
0x8001_00AC - Read/Write
0x0000_0000
Unchanged
Receive Status Enqueue register. The Receive Status Enqueue register is
used to define the number of free entries available in the status queue. Only
the Receive Status Increment field is writable and any value written to this field
will be added to the existing Receive Status Value. Whenever complete
statuses are written by the MAC, the Receive Status Value is decremented by
the number read. For example, if the Receive Status Value is 0x07, and the
Host writes 0x03 to the Receive Status Increment, the new Receive Status
Value will be 0x0A. If the controller then reads two descriptors, the Value will
be 0x08.
RSVD:
RSV:
RSI:
0x8001_00EC - Read/Write
RSVD
27
27
11
11
26
10
26
10
Copyright 2007 Cirrus Logic
25
25
9
9
Reserved. Unknown During Read.
Receive Status Value.
Receive Status Increment.
24
24
8
8
RSV
23
23
7
7
22
22
6
6
RHL2
21
21
5
5
RHL1
20
20
4
4
RSI
19
19
3
3
18
18
2
2
17
17
1
1
DS785UM1
16
16
0
0