EP9302-IQZ Cirrus Logic Inc, EP9302-IQZ Datasheet - Page 248

• Manufacturer Part Number: EP9302-IQZ
• Description: IC ARM9 SOC PROCESSOR 208LQFP
• Manufacturer: Cirrus Logic Inc
• Series: EP9r

Specifications of EP9302-IQZ

• Core Size: 16/32-Bit
• Core Processor: ARM9
• Speed: 200MHz
• Connectivity: EBI/EMI, Ethernet, I²C, IrDA, SPI, UART/USART, USB
• Peripherals: AC'97, DMA, I&sup2:S, LED, MaverickKey, POR, PWM, WDT
• Number Of I /o: 19
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 5x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 208-LQFP
• Controller Family/series: (ARM9)
• No. Of I/o's: 19
• Ram Memory Size: 16MB
• Cpu Speed: 200MHz
• No. Of Timers: 3
• No. Of Pwm Channels: 1
• Digital Ic Case Style: LQFP
• Embedded Interface Type: AC97, I2S, SPI, UART, USB
• Rohs Compliant: Yes
• Processor Series: EP93xx
• Core: ARM920T
• Data Bus Width: 32 bit
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: EDB9302A-Z
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1132 - KIT DEVELOPMENT EP9302 ARM9
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 598-1253

7
Hardware Cursor Registers
CursorAdrStart
7-66
Raster Engine With Analog/LCD Integrated Timing and Interface
EP93xx User’s Guide
31
15
Bit Descriptions:
Address: 0x8003_0060
Default: 0x0000_0000
Definition: Cursor Image Address Start register
Bit Descriptions:
30
14
29
13
28
12
RSVD:
BGOFF:
NA:
ADR:
27
11
26
10
Copyright 2007 Cirrus Logic
25
9
Reserved - Unknown during read
Background Off - Read/Write
The function of Background Off value that is written to this
field is defined by the selected blink mode.
When the value of the M field in the
select ‘blink to background’ mode, the BGOFF field
defines a 24-bit color for the background.
When the value of the M field in the
select ‘blink to offset’ mode, the BGOFF field defines the
mathematical offset value for the blink color. The format for
the mathematical offset is based on the color display mode
- that is, 888, 565, 555 (see
33).
Address - Read/Write
The Cursor Address Start value that is written to this field
specifies the SDRAM location that contains the start of the
cursor image. The cursor image is 2-bits per pixel, and is
stored linearly. The amount of storage space is dependent
on the width and height of the cursor.
Not Assigned - Will return the written value
ADR
24
8
ADR
23
7
22
6
21
5
“Types of Blinking” on page 7-
20
4
PixelMode
PixelMode
19
3
18
2
is written to
is written to
17
1
DS785UM1
NA
16
0