EP9302-IQZ Cirrus Logic Inc, EP9302-IQZ Datasheet - Page 468

• Manufacturer Part Number: EP9302-IQZ
• Description: IC ARM9 SOC PROCESSOR 208LQFP
• Manufacturer: Cirrus Logic Inc
• Series: EP9r

Specifications of EP9302-IQZ

• Core Size: 16/32-Bit
• Core Processor: ARM9
• Speed: 200MHz
• Connectivity: EBI/EMI, Ethernet, I²C, IrDA, SPI, UART/USART, USB
• Peripherals: AC'97, DMA, I&sup2:S, LED, MaverickKey, POR, PWM, WDT
• Number Of I /o: 19
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 5x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 208-LQFP
• Controller Family/series: (ARM9)
• No. Of I/o's: 19
• Ram Memory Size: 16MB
• Cpu Speed: 200MHz
• No. Of Timers: 3
• No. Of Pwm Channels: 1
• Digital Ic Case Style: LQFP
• Embedded Interface Type: AC97, I2S, SPI, UART, USB
• Rohs Compliant: Yes
• Processor Series: EP93xx
• Core: ARM920T
• Data Bus Width: 32 bit
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: EDB9302A-Z
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1132 - KIT DEVELOPMENT EP9302 ARM9
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 598-1253

11
HcRhDescriptorA
11-28
Universal Serial Bus Host Controller
EP93xx User’s Guide
31
15
Address:
Default:
Definition:
Bit Descriptions:
RSVD
30
14
29
13
NOCP
28
12
0x8002_0048
0x0200_1203
Describes the root hub.
RSVD:
NDP:
PSM:
P
OCPM
27
11
DT
26
10
Copyright 2007 Cirrus Logic
NPS
25
9
Reserved. Unknown During Read.
NumberDownstreamPorts. These bits specify the number
of downstream ports supported by the Root Hub. It is
implementation-specific. The minimum number of ports is
1. The maximum number of ports supported by OpenHCI
is 15.
0x03 = 3 downstream ports.
PowerSwitchingMode. This bit is used to specify how the
power switching of the Root Hub ports is controlled. It is
implementation-specific. This field is only valid if the
NoPowerSwitching field is cleared.
0: All ports are powered at the same time.
1: Each port is powered individually.
This mode allows port power to be controlled by either the
global switch or per-port switching. If the
PortPowerControlMask bit is set, the port responds only to
port power commands (Set/ClearPortPower). If the port
mask is cleared, the port is controlled only by the global
power switch (Set/ClearGlobalPower).
PSM
24
8
23
7
22
6
21
5
20
4
RSVD
NDP
19
3
18
2
17
1
DS785UM1
16
0