EP9302-IQZ Cirrus Logic Inc, EP9302-IQZ Datasheet - Page 615

• Manufacturer Part Number: EP9302-IQZ
• Description: IC ARM9 SOC PROCESSOR 208LQFP
• Manufacturer: Cirrus Logic Inc
• Series: EP9r

Specifications of EP9302-IQZ

• Core Size: 16/32-Bit
• Core Processor: ARM9
• Speed: 200MHz
• Connectivity: EBI/EMI, Ethernet, I²C, IrDA, SPI, UART/USART, USB
• Peripherals: AC'97, DMA, I&sup2:S, LED, MaverickKey, POR, PWM, WDT
• Number Of I /o: 19
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 5x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 208-LQFP
• Controller Family/series: (ARM9)
• No. Of I/o's: 19
• Ram Memory Size: 16MB
• Cpu Speed: 200MHz
• No. Of Timers: 3
• No. Of Pwm Channels: 1
• Digital Ic Case Style: LQFP
• Embedded Interface Type: AC97, I2S, SPI, UART, USB
• Rohs Compliant: Yes
• Processor Series: EP93xx
• Core: ARM920T
• Data Bus Width: 32 bit
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: EDB9302A-Z
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1132 - KIT DEVELOPMENT EP9302 ARM9
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 598-1253

IrDA
EP93xx User’s Guide
When a framing error is detected all subsequent data in the frame is discarded by the interface and an
entry is put into the buffer with the FRE and EOF bits set The data in this buffer entry is invalid.
If any two sequential symbols within the data field do not contain pulses (are 0000b), the
frame is aborted. The oldest byte in the temporary buffer is moved to the receive buffer (the
remaining four buffer entries are discarded). The end of frame (EOF) tag is set within the
same buffer entry where the last “good” byte of data resides and the receiver logic begins to
search for the preamble. An abort occurs if any data symbol contains 0011b, 1010b, 0101b,
17
or 1001b (invalid symbols which do not occur in the stop flag).
The receiver continuously searches for the 8 symbol stop flag. Once it is recognized, the last
byte placed within the receive buffer is flagged as the last byte of the frame and the data in
the temporary buffer is removed and used as the 32 bit CRC value for the frame. Instead of
placing this in the receive buffer, the receiver compares it to the CRC-32 value which is
continuously calculated using the incoming data stream. If they do not match, the last byte
which was placed in the receiver buffer is also tagged with a CRC error. The CRC value is not
placed in the receive buffer.
If the user disables the FIR’s receiver during operation, reception of the current data byte is
stopped immediately, the serial shifter and receive buffer are cleared and all clocks used by
the receive logic are automatically shut off to conserve power.
17.5.2.3 Transmit Operation
Immediately after enabling the FIR for transmission, the user may either “prime” the transmit
buffer by filling it with data (see section
Section 17.5.2 on page 17--17
for details) or allow
service requests to cause the CPU or DMA to fill the buffer once the FIR is enabled. Once
enabled, the transmit logic issues a service request if its buffer is empty. For each frame
output, a minimum of sixteen preambles are transmitted. If data is not available after the
sixteenth preamble, additional preambles are output until a byte of valid data resides within
the bottom of the transmit buffer. The preambles are then followed by the start flag and then
the data from the transmit buffer. Four symbols (8 bits) are encoded at a time and then loaded
into a serial shift register. The contents are shifted out onto the transmit pin clocked by the
8 MHz baud clock. Note that the preamble, start and stop flags and CRC value is
automatically transmitted and need not be placed in the transmit buffer.
When the transmit buffer is emptied, an interrupt and/or DMA service request is signalled. If
new data is not supplied quickly enough and the transmit logic attempts to take additional
data from the empty buffer, one of two actions can be taken as programmed by the user. An
underrun can either signal the normal completion of a frame or an unexpected termination of
a frame in progress.
When normal frame completion is selected and an underrun occurs, the transmit logic
transmits the 32 bit CRC value calculated during the transmission of all data within the frame
(including the address and control bytes), followed by the stop flag to denote the end of the
frame. The transmitter then continuously transmits preambles until data is once again
available within the buffer. Once data is available, the transmitter begins transmission of the
next frame.
DS785UM1
17-19
Copyright 2007 Cirrus Logic