EP9302-IQZ Cirrus Logic Inc, EP9302-IQZ Datasheet - Page 755

IC ARM9 SOC PROCESSOR 208LQFP

EP9302-IQZ

Manufacturer Part Number
EP9302-IQZ
Description
IC ARM9 SOC PROCESSOR 208LQFP
Manufacturer
Cirrus Logic Inc
Series
EP9r
Datasheets

Specifications of EP9302-IQZ

Core Size
16/32-Bit
Core Processor
ARM9
Speed
200MHz
Connectivity
EBI/EMI, Ethernet, I²C, IrDA, SPI, UART/USART, USB
Peripherals
AC'97, DMA, I&sup2:S, LED, MaverickKey, POR, PWM, WDT
Number Of I /o
19
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 5x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
208-LQFP
Controller Family/series
(ARM9)
No. Of I/o's
19
Ram Memory Size
16MB
Cpu Speed
200MHz
No. Of Timers
3
No. Of Pwm Channels
1
Digital Ic Case Style
LQFP
Embedded Interface Type
AC97, I2S, SPI, UART, USB
Rohs Compliant
Yes
Processor Series
EP93xx
Core
ARM920T
Data Bus Width
32 bit
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
EDB9302A-Z
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1132 - KIT DEVELOPMENT EP9302 ARM9
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
 Details
Other names
598-1253

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP9302-IQZ
Manufacturer:
Cirrus Logic Inc
Quantity:
10 000
Part Number:
EP9302-IQZ
Manufacturer:
CIRRUS
Quantity:
20 000
Register Descriptions
TSSetup
DS785UM1
25.3 Registers
TDTCT
EN
31
15
0x8090_000C TSDischarge
0x8090_001C
0x8090_0000
0x8090_0004 TSXYMaxMin
0x8090_0008 TSXYResult
0x8090_0010 TSXSample
0x8090_0014 TSYSample
0x8090_0018
0x8090_0020 TSSWLock
0x8090_0024
Address:
Default:
Address
Note: The touch screen controller block decodes APB address bits PADR[6:2] only. If the decode
30
14
for the PSEL_HATSH APB block select is a larger block size in the APB decoder, the
registers will be repeated through memory. Touch screen controller registers are intended
to be word accessed only. Since the least significant bytes of the address bus are not
decoded, byte and half word accesses are not allowed and may have unpredictable
results.
DEV
29
13
TSSetup2
TSDetect
TSSetup
TSDirect
Name
RSVD
28
12
0x8090_0000
0x0000_0000
locked
Write Read/Write 28 bits Analog Resistive Touch Screen controller Switch Matrix control register.
Write Read/Write 28 bits Analog Resistive Touch Screen controller Switch Matrix control register.
Write Read/Write 28 bits Analog Resistive Touch Screen controller Switch Matrix control register.
Write Read/Write 28 bits Analog Resistive Touch Screen controller Switch Matrix control register.
Write Read/Write 28 bits Analog Resistive Touch Screen controller Switch Matrix control register.
SW
No
No
No
NA
No
Table 25-4. Analog Touch Screen Register Memory Map
27
11
NSMP
Read/Write 26 bits
Read/Write 32 bits
Read/Write
Read/Write
Read Only
Type
26
10
Copyright 2007 Cirrus Logic
8-bit write
1-bit read
25
9
32 bits
9 bits
Size
24
8
Analog Resistive Touch Screen controller setup control register #2.
Analog Resistive Touch Screen controller software lock register.
Analog Resistive Touch Screen controller setup control register.
Analog Resistive Touch Screen controller max/min register.
23
7
Analog Resistive Touch Screen controller result register.
22
6
21
5
SDLY
DLY
Description
20
4
Analog Touch Screen Interface
19
3
EP93xx User’s Guide
18
2
17
1
25-17
16
0
25

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