HD6417727F160V Renesas Electronics America, HD6417727F160V Datasheet - Page 155

MPU 3V 16K PB-FREE 240-QFP

HD6417727F160V

Manufacturer Part Number
HD6417727F160V
Description
MPU 3V 16K PB-FREE 240-QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417727F160V

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
160MHz
Connectivity
FIFO, SCI, SIO, SmartCard, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
104
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.7 V ~ 2.05 V
Data Converters
A/D 6x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
240-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

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3.1
3.1.1
The SH7727 has an on-chip memory management unit (MMU) that implements address
translation. The SH7727 features a resident translation look-aside buffer (TLB) that caches
information for user-created address translation tables located in external memory. It enables high-
speed translation of logical addresses into physical addresses. Address translation uses the paging
system and supports two page sizes (1 kbyte and 4 kbytes). The access right to logical address
space can be set for privileged and user modes to provide memory protection.
3.1.2
The MMU is a feature designed to make efficient use of physical memory. As shown in figure 3.1,
if a process is smaller in size than the physical memory, the entire process can be mapped onto
physical memory. However, if the process increases in size to the extent that it no longer fits into
physical memory, it becomes necessary to partition the process and to map those parts requiring
execution onto memory as occasion demands (1). Having the process itself consider this mapping
onto physical memory would impose a large burden on the process. To lighten this burden, the
idea of virtual memory was born as a means of performing en bloc mapping onto physical
memory (2). In a virtual memory system, substantially more virtual memory than physical
memory is provided, and the process is mapped onto this virtual memory. Thus a process only has
to consider operation in virtual memory. Mapping from virtual memory to physical memory is
handled by the MMU. The MMU is normally controlled by the operating system, switching
physical memory to allow the virtual memory required by a process to be mapped onto physical
memory in a smooth fashion. Switching of physical memory is carried out via secondary storage,
etc.
The virtual memory system that came into being in this way is particularly effective in a time-
sharing system (TSS) in which a number of processes are running simultaneously (3). If processes
running in a TSS had to take mapping onto virtual memory into consideration while running, it
would not be possible to increase efficiency. Virtual memory is thus used to reduce this load on
the individual processes and so improve efficiency (4). In the virtual memory system, virtual
memory is allocated to each process. The task of the MMU is to perform efficient mapping of
these virtual memory areas onto physical memory. It also has a memory protection feature that
prevents one process from inadvertently accessing another process’s physical memory.
Overview
Features
Role of MMU
Section 3 Memory Management Unit (MMU)
Section 3 Memory Management Unit (MMU)
Rev.6.00 Mar. 27, 2009 Page 97 of 1036
REJ09B0254-0600

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