HD6417727F160V Renesas Electronics America, HD6417727F160V Datasheet - Page 324

MPU 3V 16K PB-FREE 240-QFP

HD6417727F160V

Manufacturer Part Number
HD6417727F160V
Description
MPU 3V 16K PB-FREE 240-QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417727F160V

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
160MHz
Connectivity
FIFO, SCI, SIO, SmartCard, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
104
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.7 V ~ 2.05 V
Data Converters
A/D 6x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
240-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

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Section 10 On-Chip Oscillation Circuits
5. Bus clock (Bφ) frequency:
6. The frequency of the peripheral clock (Pφ) becomes:
7. The output frequency of PLL circuit 1 is the product of the CKIO frequency and the
8. ×1, ×2, ×3, ×4, or ×6 can be used as the multiplication ratio of PLL circuit 1. ×1, ×1/2, ×1/3,
Rev.6.00 Mar. 27, 2009 Page 266 of 1036
REJ09B0254-0600
multiplication ratio of PLL circuit 1.
and ×1/4 can be selected as the division ratio of divider 1. ×1, ×1/2, ×1/3, ×1/4, and ×1/6 can
be selected as the division ratio of divider 2. Set the rate in the frequency control register. The
on/off state of PLL circuit 2 is determined by the mode.
Depending on the product, the clock ratio should be set to produce a frequency within one
of the ranges indicated below.
The product of the frequency of the CKIO pin, the frequency multiplication ratio of PLL
circuit 1, and the division ratio of divider 2.
For all products, the peripheral clock frequency (Pφ) should be set within the frequency
range 6 MHz to 33.34 MHz and no higher than the frequency of the CKIO pin.
The peripheral clock frequency (Pφ) should be set to 13 MHz or higher if the USB function
module is used.
100 MHz products: 24 MHz to 50 MHz
160 MHz products: 24 MHz to 66.64 MHz

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