HD6417727F160V Renesas Electronics America, HD6417727F160V Datasheet - Page 768

• Manufacturer Part Number: HD6417727F160V
• Description: MPU 3V 16K PB-FREE 240-QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417727F160V

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 160MHz
• Connectivity: FIFO, SCI, SIO, SmartCard, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.7 V ~ 2.05 V
• Data Converters: A/D 6x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 240-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Section 23 USB Function Controller
(3) Data Stage (Control-Out)
The application analyzes command data from the host in the setup stage and decides the following
data stage direction. As a result of command data analysis, when the data stage is out-transfer,
data from the host is waited. After data reception (USBIFR0/EP0o TS = 1), data is read from
FIFO. Applications then write 1 to the EP0o read-end bit, make reception FIFO empty, and wait
for the next data reception.
The end of the data stage is decided by transferring in-token by the host and entering the status
stage.
Rev.6.00 Mar. 27, 2009 Page 710 of 1036
REJ09B0254-0600
Data reception from host
(USBIFR0/EP0o TS = 1)
Set EP0o receive-end
OUT token reception
OUT token reception
to USBTRG/EP0s
to USBTRG/EP0o
USB function
1 written
1 written
flag to 1
RDFN?
RDFN?
Figure 23.7 Data Stage Operation (Control-Out)
Yes
Yes
ACK
NACK
NACK
No
No
Interrupt request
Write 1 to EP0o read-end bit
Clear EP0o receive-end flag
data register (USBEPDR0o)
(USBTRG/EP0o RDFN = 1)
Read data from USBEP0o
Read data from USBEP0o
(USBIFR0/EP0o TS = 0)
data size register
(USBEPSZ0o)
Application