PEF20550HV21XT Lantiq, PEF20550HV21XT Datasheet - Page 176

• Manufacturer Part Number: PEF20550HV21XT
• Manufacturer: Lantiq

Specifications of PEF20550HV21XT

• Lead Free Status / Rohs Status: Supplier Unconfirmed

4.7.12 Receive Status Register (RSTA)
Access in demultiplexed P-interface mode:
Access in multiplexed P-interface mode:
Reset value: xx
RSTA always displays the momentary state of the receiver. Because this state can differ
from the last entry in the FIFO it is reasonable to always use the status bytes in the FIFO.
VFR
Note: Shorter frames are not reported.
RDO
CRC
RAB
Semiconductor Group
bit 7
VFR
Valid Frame.
Indicates whether the received frame is valid (’1’) or not (’0’ invalid).
A frame is invalid when
– its length is not an integer multiple of 8 bits (n 8 bits), e.g. 25 bit,
– its is to short, depending on the selected operation mode:
– a frame was aborted (note: VFR can also be set when a frame was
Receive Data Overflow.
A '1' indicates, that a RFIFO-overflow has occurred within the actual frame.
CRC-Compare Check.
0: CRC check failed, received frame contains errors.
1: CRC check o.k., received frame is error free.
Receive message Aborted.
When '1' the received frame was aborted from the transmitting station.
According to the HDLC-protocol, this frame must be discarded by the CPU.
RDO
auto-mode/non-auto mode (2-byte address field):
auto-mode/non-auto mode (1-byte address field):
transparent mode 1:
transparent mode 0:
aborted)
H
CRC
RAB
176
read
read
HA1
address: (Ch-A/Ch-B): 27
address: (Ch-A/Ch-B): 4E
Detailed Register Description
HA0
4 bytes
3 bytes
3 bytes
2 bytes
C/R
PEB 20550
PEF 20550
bit 0
H
H
LA
/67
/CE
01.96
H
H