PEF20550HV21XT Lantiq, PEF20550HV21XT Datasheet - Page 255

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PEF20550HV21XT

Manufacturer Part Number
PEF20550HV21XT
Description
Manufacturer
Lantiq
Datasheet

Specifications of PEF20550HV21XT

Lead Free Status / Rohs Status
Supplier Unconfirmed
The Procedure for Reading the CM Code is
W:MAAR
W:MACR
wait for STAR:MAC = 0
R:MADR =
CMC3 … 0: CM code, refer to table 40
Figure 90 illustrates this behavior.
Figure 90
Read Access to the Control Memory Code Field
Semiconductor Group
MACR:
1
1
= CFI timeslot address encoded according to figure 84
= 1111 XXXX
1
bit 7
1
X
X X
X
X
Up-
stream
X
Down-
stream
B
MADR:
CFI
Frame
X
X
0
127
0
127
X
X X
255
MD3
Control Memory
X
Code Field
MD2
MD1
CMC3
MD0 MAAR:
CMC2
U/D = 1
U/D = 0
U/D
MA6
.
Application Hints
CMC1
.
.
PEB 20550
PEF 20550
.
ITD08069
bit 0
. MA0
CMC0
01.96

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