PEF20550HV21XT Lantiq, PEF20550HV21XT Datasheet - Page 269

• Manufacturer Part Number: PEF20550HV21XT
• Manufacturer: Lantiq

Specifications of PEF20550HV21XT

• Lead Free Status / Rohs Status: Supplier Unconfirmed

W:MAAR
W:MACR
Finally the CSCR register has to be programmed to define the subchannel positions at
the CFI:
W:CSCR = 1001 XX11
After these three programming steps, the ELIC memories will have the following content:
Figure 93
Memory Content in Case of CFI - PCM Subchannel Connections
Downstream: CFI port 2, timeslot 10, bits 5 … 4 from PCM port 0, timeslot 4, bits 7 … 6
W:MADR
Semiconductor Group
Up-
stream
Down-
stream
CFI
Frame
0
127
0
127
P0, TS3
Bits 1, 0
P3, TS7
Bits 3, 2
P2, TS7
Bits 3, 0
P2, TS10
Bits 5, 4
= 0001 0000
= 0010 1100
= 0111 0111
Code Field
0
0 1
0
0
1 0
0
1
1
1
1 1
0
0
1
B
Control Memory
B
B
B
0
0 0 0
1 0 0 1
1
0
0
PCM timeslot encoding, the subchannel position is
defined by MACR:CMC3 … 0 = 0111
CFI timeslot encoding, the subchannel position is
defined by CSCR:SC21 … 20 = 01
CM code for switching a 16 kBit/s/bits 7 … 6
channel (0111)
Data Field
0
0
0
1
1
port 0: bits 1 … 0 or 3 … 0; port 1: not used in this
example;
port 2: bits 5 … 4 or 3 … 0; port 3: bits 3 … 2 or 7 … 4
0
0
0
1 0
0 0 0
0
0
0
0
1
0
0
1
269
Code Field
0
1
0 1
Data Memory
-
-
Data Field
- -
Application Hints
Bits 7, 4
Bits 7, 6
P0, TS4
P1, TS3
P0, TS4
PEB 20550
PCM
Frame
PEF 20550
0
127
0
127
Up-
stream
ITD08072
Down-
stream
01.96