PEF20550HV21XT Lantiq, PEF20550HV21XT Datasheet - Page 368

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PEF20550HV21XT

Manufacturer Part Number
PEF20550HV21XT
Description
Manufacturer
Lantiq
Datasheet

Specifications of PEF20550HV21XT

Lead Free Status / Rohs Status
Supplier Unconfirmed
Sent from XFIFO of SACCO-A to terminal A:
Received at RFIFO of SACCO-A from terminal A:
The connection has been established, and subscribers A and B can now
communicate.
6.1.7.2 Closing the Data Loop
With both subscribers ready at their terminals, the data loop between them can be
closed:
downstream: PCM port 0, time slot 2 to the B1 time slot of IOM-2 channel 0
Write
Write
Write
downstream: PCM port 0, time slot 1 to the B1 time slot of IOM-2 channel 1
Write
Write
Write
6.1.7.3 Giving both Terminals the ‘Go-Ahead’ to Transceive Data
Finally, the ELIC informs both terminals that the connection has been made. This acts
as the go-ahead to pass their subscriber’s data, via the ELIC, to the other subscriber:
Sent from XFIFO of SACCO-A to terminal B:
Received at RFIFO of SACCO-A from terminal B:
Write
Semiconductor Group
MADR = 08
MAAR = 00
MACR = 71
MADR = 01
MAAR = 10
MACR = 71
XDC = 00
H
direct SACCO-A transmission to IOM-2 port 0, channel 0
H
H
H
H
H
H
downstream connection: (from) PCM port 0, TS2
downstream CM address: (to) CFI port 0, time slot 0
upper nibble: write CM data and code
lower nibble: set CM code for 64 kbit/s (8 bit) switching
downstream connection: (from) PCM port 0, TS1
downstream CM address: (to) CFI port 0, time slot 4
upper nibble: write CM data and code
lower nibble: set CM code for 64 kbit/s (8 bit) switching
368
I-frame: Connect
Acknowledgement
Receiver Ready (as
acknowledgement)
I-frame: Connected
Receiver Ready (as
acknowledgement)
Application Notes
PEB 20550
PEF 20550
01.96

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