PEF20550HV21XT Lantiq, PEF20550HV21XT Datasheet - Page 223

• Manufacturer Part Number: PEF20550HV21XT
• Manufacturer: Lantiq

Specifications of PEF20550HV21XT

• Lead Free Status / Rohs Status: Supplier Unconfirmed

Figure 73 shows the relationship between FSC, DCL, DD# and DU#:
Required register setting for SLD:
CMD1 = 0XXX1100
Figure 74 shows the relationship between FSC, DCL and SIP#:
Required register setting for IOM-2:
CMD1 = 0XXX0000
Figure 73
IOM
Figure 74
SLD Interface Signals
Semiconductor Group
RCL
DCL
SIP#
(OUT)
SIP#
(IN)
FSC
FSC
DCL
DD#
DU#
TS31, Bit 1
®
-2 Interface Signals
TS7,
Bit 4
TS31,
TS31,
Bit 0
TS7, Bit 3
Bit 0
TS0,Bit 7
B
B
TS0,Bit 7
, CMD2 = D0
, CMD2 = D0
TS7,
Bit 2
TS0,Bit 6
TS0,Bit 6
TS7, Bit 1
H
H
TS0,
, CBNR = FF
, CBNR = 1F
TS0,
Bit 5
TS7,
Bit 5
Bit 0
223
TS0,
TS0, Bit 7
TS0,
Bit 4
Bit 4
H
H
, CTAR = XX
, CTAR = XX
TS0,
TS0, Bit 6
TS0,
Bit 3
Bit 3
TS0,
TS0, Bit 5
TS0,
Bit 2
H
H
Bit 2
, CBSR = X0
, CBSR = X0
TS0,
TS0, Bit 4
Application Hints
TS0,
Bit 1
Bit 1
PEB 20550
PEF 20550
TS0,
TS0, Bit 3
TS0,
H
H
Bit 0
.
.
ITT08053
Bit 0
ITT08052
01.96