LSISASX12 LSI, LSISASX12 Datasheet - Page 154

• Manufacturer Part Number: LSISASX12
• Manufacturer: LSI

Specifications of LSISASX12

• Lead Free Status / Rohs Status: Not Compliant

Register: 0x0004
Read/Write
4-76
31
0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Table 4.6
The following provides detailed bit definitions for the Link registers.
Register Descriptions
Copyright © 2004, 2005 by LSI Logic Corporation. All rights reserved.
24 23
0x10C–0x11C
0x124–0x140
0xD0–0x104
0xB0–0xBC
0x90–0x94
Offset
0x108
0x120
0xCC
0x8C
0x9C
0xAC
0xC0
0xC4
0xC8
0xA0
0xA4
0xA8
0x98
Sphynx Link Register Map (Cont.)
Identify Address Information
Reserved
Device Type
This field must be set to 0b010 to indicate an edge
expander device.
16 15
Affiliated STP Initiator Address High
Affiliated STP Initiator Address Low
SATA Nexus Loss Timeout
Broadcast Change High
SATA Connection Mode
Broadcast Change Low
Phy Control Link Rates
Connection Information
SATA Dev2Host FIS3
Broadcast SES High
Broadcast SES Low
Phy Control PPTOV
Register Name
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
8 7
0
0 0 0 1
[30:28]
1
31
0
0