LSISASX12 LSI, LSISASX12 Datasheet - Page 30

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LSISASX12

Manufacturer Part Number
LSISASX12
Description
Manufacturer
LSI
Datasheet

Specifications of LSISASX12

Lead Free Status / Rohs Status
Not Compliant

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Table 2.1
2.1.5.5
2-8
SIO Signal Name LSISASx12 Signal
SioEnd
SioStart
SioDout
SioDin
SioClkin
SioClkout
BlinkClkin
BlinkClkout
Spin-Up Control
SIO Signal Description and Mapping
LED_STATUS[6]/
LED_STATUS[7]/
LED_STATUS[8]/
LED_STATUS[9]/
LED_STATUS[10]/
LED_STATUS[11]/
LEDSYNCIN
LEDSYNCOUT
.
This subblock coordinates when each SPhynx module allows an
attached drive to spin up. The spin-up controller monitors spin-up
requests from each SPhynx module and issues spin-up
acknowledgements to the requesting SPhynx modules according to the
following configurable parameters:
Functional Description
Copyright © 2004, 2005 by LSI Logic Corporation. All rights reserved.
Spin Number – maximum number of concurrent spin-ups
Spin-up Delay – spin-up time interval
Spin Mode – selects one of three modes for spin-up of SATA drives:
Immediate, Host-notify, or self-timed
I/O Description
O
O
O
O
I
I
I
I
This output signal indicates that this module is
currently driving the last bit of serial data on the
SioDout line.
This signal indicates that serial data may be driven on
the SioDout line during the next clock cycle, and that
data can be received on the SioDin line.
In Single originator mode, which is set by the
SioMode bit in the SIO Control register, the SioEnd
signal provides the start signal, and the LSISASx12
does not require an SioStart input.
This signal provides the serial data output line.
This signal provides the serial data input line.
An originator with ClkEnable set to 1 in its SIO_CFG
register drives SioClkout as an output. The ClkDivide
bits in the SIO_CFG register control the frequency of
this clock. Originators with ClkEnable cleared to 0
receive this clock signal on SioClkin.
An originator with ClkEnable set to 1 in its SIO_CFG
register drives BlinkClkout as an output with the
frequency fixed at 0.5 Hz. Originators with ClkEnable
cleared to 0 receive this clock signal on BlinkClkin.

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