LSISASX12 LSI, LSISASX12 Datasheet - Page 80

• Manufacturer Part Number: LSISASX12
• Manufacturer: LSI

Specifications of LSISASX12

• Lead Free Status / Rohs Status: Not Compliant

Table 4.1
4.1
4-2
Region
Configuration Manager Registers
SMP Target Registers
SPhynx Registers
Reserved
SPhynx[00]
SPhynx[00]
SPhynx[01]
SPhynx[01]
SPhynx[02]
SPhynx[02]
SPhynx[03]
SPhynx[03]
SPhynx[04]
SPhynx[04]
SPhynx[05]
SPhynx[05]
SPhynx[06]
SPhynx[06]
SPhynx[07]
SPhynx[07]
SPhynx[08]
SPhynx[08]
SPhynx[09]
SPhynx[09]
SPhynx[10]
SPhynx[10]
SPhynx[11]
SPhynx[11]
STP Target Registers
Primary Internal Registers Address Map
Link Registers
Phy Registers
Link Registers
Phy Registers
Link Registers
Phy Registers
Link Registers
Phy Registers
Link Registers
Phy Registers
Link Registers
Phy Registers
Link Registers
Phy Registers
Link Registers
Phy Registers
Link Registers
Phy Registers
Link Registers
Phy Registers
Link Registers
Phy Registers
Link Registers
Phy Registers
Top-Level Address Map
1
Table 4.1
address space is further explained in subsequent sections.
Register Descriptions
Copyright © 2004, 2005 by LSI Logic Corporation. All rights reserved.
provides a top-level address map for the LSISASx12. Each
128 Kbytes
64 Kbytes
32 Kbytes
32 Kbytes
1 Kbyte
1 Kbyte
1 Kbyte
1 Kbyte
1 Kbyte
1 Kbyte
1 Kbyte
1 Kbyte
1 Kbyte
1 Kbyte
1 Kbyte
1 Kbyte
1 Kbyte
Size
0x41C00–0x41DFF
0x40B00–0x40BFF
0x40C00–0x40EFF
0x41B00–0x41BFF
0x42B00–0x42BFF
0x42C00–0x42EFF
0x00000–0x0FFFF
0x18000–0x1FFFF
0x20000–0x3FFFF
0x40800–0x40AFF
0x40F00–0x40FFF
0x41800–0x41AFF
0x41F00–0x41FFF
0x42800–0x42AFF
0x42F00–0x42FFF
0x10000–0x17FFF
0x40000–0x402FF
0x40300–0x403FF
0x40400–0x406FF
0x40700–0x407FF
0x41000–0x412FF
0x41300–0x413FF
0x41400–0x416FF
0x41700–0x417FF
0x42000–0x422FF
0x42300–0x423FF
0x42400–0x426FF
0x42700–0x427FF
0x43000–0x433FF
Address Range
Page
4-72
4-75
4-75
4-93
4-75
4-93
4-75
4-93
4-75
4-93
4-75
4-93
4-75
4-93
4-75
4-93
4-75
4-93
4-75
4-93
4-75
4-93
4-75
4-93
4-75
4-93
4-99
4-3
–