LSISASX12 LSI, LSISASX12 Datasheet - Page 94

• Manufacturer Part Number: LSISASX12
• Manufacturer: LSI

Specifications of LSISASX12

• Lead Free Status / Rohs Status: Not Compliant

Register: 0x0050
Read/Write
Register: 0x0090
Read/Write
4-16
31
31
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Register Descriptions
Copyright © 2004, 2005 by LSI Logic Corporation. All rights reserved.
24 23
24 23
This field contains the transmit polarity bits for each phy.
Setting a bit inverts transmitter polarity for the corre-
sponding phy from the default polarity of the phy. This is
done to improve routing of board designs. Bit [0] corre-
sponds to Phy[0], while bit [11] corresponds to Phy [11].
Reserved
Phy Receiver Polarity
This field contains receiver polarity bit for each phy. Set-
ting a bit inverts receiver polarity for the corresponding
phy from the default polarity of the phy. This is done to
improve routing of board designs. Bit [0] corresponds to
Phy [0], while bit [11] corresponds to Phy [11].
Boot Sequencer Active
This read-only bit provides boot sequencer activity status.
This bit asserts when the boot sequencer is active.
Boot OK
This read-only bit provides the boot sequencer comple-
tion status. This bit asserts if the boot operation ends nor-
mally.
Reserved
Boot Control and Status
Phy Receiver Polarity
16 15
16 15
8 7
8 7
0
0
0 0 0 0
0 0 0 0
[31:12]
[29:18]
[11:0]
0
0
31
30
0
0
0
0