LSISASX12 LSI, LSISASX12 Datasheet - Page 178
LSISASX12
Manufacturer Part Number
LSISASX12
Description
Manufacturer
LSI
Datasheet
1.LSISASX12.pdf
(268 pages)
Specifications of LSISASX12
Lead Free Status / Rohs Status
Not Compliant
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4-100
Table 4.10
The STP Target registers base address is 0x43000. The STP Target
registers can also be written via a broadcast write, using the Broadcast
Base Address of 0x18000. However, only use this mechanism to write to
the
Register Descriptions
Copyright © 2004, 2005 by LSI Logic Corporation. All rights reserved.
0x10C–0x1FC
0x0B0–0x107
0x210–0x21C
0x224–0x30C
0x330–0x3FF
0x090–0x94
SATA Nexus Loss Timeout
0x0AC
Offset
0x08C
0x09C
0x20C
0x31C
0x32C
0x0A0
0x0A4
0x0A8
0x098
0x108
0x200
0x204
0x208
0x220
0x310
0x314
0x318
0x320
0x324
0x328
STP Target Register Map (Cont.)
Error Log – R_ERR Transmitted/Received Count
Last H2D Register FIS Received Dword 0
Last H2D Register FIS Received Dword 1
Last H2D Register FIS Received Dword 2
Last H2D Register FIS Received Dword 3
Error Log – Unexpected SYNC Count
Affiliated STP Initiator Address High
Affiliated STP Initiator Address Low
Error Log – I
registers.
SATA Dev2Host Reset FIS3
SATA Nexus Loss Timeout
Error Log – Invalid DWord
STP Connection Control
Phy Control Link Rates
Connection Information
Phy Control PPTOV
SMP Phy Operation
STP Error Status
Register Name
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
2
C CRC Error Count
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