SAM9G10 Atmel Corporation, SAM9G10 Datasheet - Page 362
SAM9G10
Manufacturer Part Number
SAM9G10
Description
Manufacturer
Atmel Corporation
Datasheets
1.SAM9261.pdf
(1274 pages)
2.SAM9261.pdf
(43 pages)
3.SAM9G10.pdf
(750 pages)
4.SAM9G10.pdf
(39 pages)
Specifications of SAM9G10
Flash (kbytes)
0 Kbytes
Pin Count
217
Max. Operating Frequency
266 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
96
Ext Interrupts
96
Usb Transceiver
3
Usb Speed
Full Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
1
Uart
4
Ssc
3
Sd / Emmc
1
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
No
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
16
Self Program Memory
NO
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.08 to 1.32
Fpu
No
Mpu / Mmu
No/Yes
Timers
3
Output Compare Channels
3
Input Capture Channels
3
32khz Rtc
Yes
Calibrated Rc Oscillator
No
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Figure 30-7.
362
(from master)
(from slave)
TXEMPTY
NPCS0
SPCK
TDRE
SAM9G10
MOSI
RDRF
MISO
SPI_TDR
Write in
Status Register Flags Behavior
Figure 30-7
Transmission Register Empty (TXEMPTY) status flags behavior within the SPI_SR (Status Reg-
ister) during an 8-bit data transfer in fixed mode and no Peripheral Data Controller involved.
Figure 30-8
of TX buffer (ENDTX), RX Buffer Full (RXBUFF) and TX Buffer Empty (TXBUFE) status flags
behavior within the SPI_SR (Status Register) during an 8-bit data transfer in fixed mode with the
Peripheral Data Controller involved. The PDC is programmed to transfer and receive three data.
The next pointer and counter are not used. The RDRF and TDRE are not shown because these
flags are managed by the PDC when using the PDC.
MSB
1
MSB
shows Transmission Register Empty (TXEMPTY), End of RX buffer (ENDRX), End
shows Transmit Data Register Empty (TDRE), Receive Data Register (RDRF) and
2
6
6
3
5
5
4
4
4
5
3
3
6
6
2
2
7
1
1
shift register empty
8
LSB
LSB
6462B–ATARM–6-Sep-11
RDR read
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