SAM9G10 Atmel Corporation, SAM9G10 Datasheet - Page 568

• Manufacturer Part Number: SAM9G10
• Manufacturer: Atmel Corporation

Specifications of SAM9G10

• Flash (kbytes): 0 Kbytes
• Pin Count: 217
• Max. Operating Frequency: 266 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 96
• Ext Interrupts: 96
• Usb Transceiver: 3
• Usb Speed: Full Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 1
• Uart: 4
• Ssc: 3
• Sd / Emmc: 1
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: No
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 16
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.08 to 1.32
• Fpu: No
• Mpu / Mmu: No/Yes
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

Figure 35-10. Multiple Write Functional Flow Diagram
Note:
570
1. It is assumed that this command has been correctly sent (see
2. This field is also accessible in the MCI Block Register (MCI_BLKR).
SAM9G10
The following flowchart shows how to manage a multiple write block transfer with the PDC (see
Figure
the contents of the Interrupt Mask Register (MCI_IMR).
35-10). Polling or interrupt method can be used to wait for the end of write according to
Configure the PDC channel
MCI_TPR = Data Buffer Address to write
MCI_TCR = BlockLength/4
Send SET_BLOCKLEN command (1)
Send SELECT/DESELECT_CARD
Set the PDCMODE bit
MCI_MR |= PDCMODE
Set the block length (in bytes)
MCI_BLKR |= (BlockLength << 16)
Set the block count (if necessary)
MCI_BLKR |= (BlockCount << 0)
Send WRITE_MULTIPLE_BLOCK
command
Send STOP_TRANSMISSION
Read status register MCI_SR
MCI_PTCR = TXTEN
NOTBUSY = 0?
command
command
(1)
BLKE = 0?
Poll the bit
RETURN
Poll the bit
to select the card
No
No
(1)
(1)
Figure
(2)
35-7).
Yes
Yes
6462B–ATARM–6-Sep-11