SAM9G10 Atmel Corporation, SAM9G10 Datasheet - Page 690

• Manufacturer Part Number: SAM9G10
• Manufacturer: Atmel Corporation

Specifications of SAM9G10

• Flash (kbytes): 0 Kbytes
• Pin Count: 217
• Max. Operating Frequency: 266 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 96
• Ext Interrupts: 96
• Usb Transceiver: 3
• Usb Speed: Full Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 1
• Uart: 4
• Ssc: 3
• Sd / Emmc: 1
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: No
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 16
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.08 to 1.32
• Fpu: No
• Mpu / Mmu: No/Yes
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

38.11.32 LCD Write Protect Mode Register
Access:
• WPEN: Write Protect Enable
0 = Disables the Write Protect if WPKEY corresponds to0x4C4344 ("LCD" in ASCII).
1 = Enables the Write Protect if WPKEY corresponds to0x4C4344 ("LCD" in ASCII).
Protects the registers:
• WPKEY: Write Protect KEY
Should be written at value 0x4C4344 ("LCD" in ASCII). Writing any other value in this field aborts the write operation of the
WPEN bit. Always reads as 0.
692
692
Name:
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•
•
•
•
•
•
•
•
•
•
•
•
•
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“LCD Control Register 1” on page 672
“LCD Control Register 2” on page 673
“LCD Timing Configuration Register 1” on page 675
“LCD Timing Configuration Register 2” on page 676
“LCD Frame Configuration Register” on page 677
“LCD FIFO Register” on page 678
“LCDMOD Toggle Rate Value Register” on page 679
“Dithering Pattern DP1_2 Register” on page 680
“Dithering Pattern DP4_7 Register” on page 680
“Dithering Pattern DP3_5 Register” on page 681
“Dithering Pattern DP2_3 Register” on page 681
“Dithering Pattern DP5_7 Register” on page 682
“Dithering Pattern DP3_4 Register” on page 682
“Dithering Pattern DP4_5 Register” on page 683
“Dithering Pattern DP6_7 Register” on page 683
31
23
15
—
7
SAM9G10
SAM9G10
LCD_WPMR
Read-write
30
22
14
—
6
29
21
13
—
5
28
20
12
—
4
WPKEY
WPKEY
WPKEY
27
19
11
—
3
26
18
10
—
2
25
17
—
9
1
6462B–ATARM–6-Sep-11
6462B–ATARM–6-Sep-11
WPEN
24
16
8
0