SAM9G10 Atmel Corporation, SAM9G10 Datasheet - Page 733

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SAM9G10

Manufacturer Part Number
SAM9G10
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM9G10

Flash (kbytes)
0 Kbytes
Pin Count
217
Max. Operating Frequency
266 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
96
Ext Interrupts
96
Usb Transceiver
3
Usb Speed
Full Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
1
Uart
4
Ssc
3
Sd / Emmc
1
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
No
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
16
Self Program Memory
NO
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.08 to 1.32
Fpu
No
Mpu / Mmu
No/Yes
Timers
3
Output Compare Channels
3
Input Capture Channels
3
32khz Rtc
Yes
Calibrated Rc Oscillator
No
42.2.8
42.2.8.1
6462B–ATARM–6-Sep-11
Shutdown Controller (SHDWC)
SHDWC: Boundary Scan Mode Outputs the 32 kHz clock
In boundary scan mode, the SHDN pin outputs the 32 kHz clock.
There is only one way to disable the 32 kHz clock on the SHDN pin.
• The assembler routine:
}
AREA TEST, CODE
soft_user_reset
;disable IRQs
;change refresh rate to block all data accesses
;prepare power down command
;prepare proc_reset and periph_reset
;perform power down command
;perform proc_reset and periph_reset (in the ARM pipeline)
END
Problem Fix/Workaround
if( (*AT91C_RSTC_RSR & AT91C_RSTC_URSTS ) == AT91C_RSTC_URSTS){
soft_user_reset();
//never reached
while(1);
}
INCLUDEAT91SAM9xxx.inc
EXPORTsoft_user_reset
MRS r0, CPSR
ORR r0, r0, #0x80
MSR CPSR_c, r0
LDR r0, =AT91C_SDRAMC_TR
LDR r1, =1
STR r1, [r0]
LDR r0, =AT91C_SDRAMC_LPR
LDR r1, =2
LDR r2, =AT91C_RSTC_RCR
LDR r3, =0xA5000005
STR r1, [r0]
STR r3, [r2]
SAM9G10
735

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