SAM9G10 Atmel Corporation, SAM9G10 Datasheet - Page 648

• Manufacturer Part Number: SAM9G10
• Manufacturer: Atmel Corporation

Specifications of SAM9G10

• Flash (kbytes): 0 Kbytes
• Pin Count: 217
• Max. Operating Frequency: 266 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 96
• Ext Interrupts: 96
• Usb Transceiver: 3
• Usb Speed: Full Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 1
• Uart: 4
• Ssc: 3
• Sd / Emmc: 1
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: No
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 16
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.08 to 1.32
• Fpu: No
• Mpu / Mmu: No/Yes
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

Figure 38-3. Full Frame Timing, MMODE=1, MVAL=1
Figure 38-4. Full Frame Timing, MMODE=0
650
650
SAM9G10
SAM9G10
The LCDDOTCK signal is used to clock the data into the LCD drivers' shift register. The data is
sent through LCDD[23:0] synchronized by default with LCDDOTCK falling edge (rising edge can
be selected). The CLKVAL field of LCDCON1 register controls the rate of this signal. The divisor
can also be bypassed with the BYPASS bit in the LCDCON1 register. In this case, the rate of
LCDDOTCK is equal to the frequency of the LCDC Core clock. The minimum period of the LCD-
DOTCK signal depends on the configuration. This information can be found in
The LCDDOTCK signal has two different timings that are selected with the CLKMOD field of the
LCDCON2 register:
Table 38-13. Minimum LCDDOTCK Period in LCDC Core Clock Cycles
DISTYPE
TFT
STN Mono
STN Mono
STN Mono
STN Mono
STN Color
• Always Active (used with TFT LCD Modules)
• Active only when data is available (used with STN LCD Modules)
LCDDOTCK
LCDDOTCK
LCDMOD
LCDMOD
LCDVSYNC
LCDVSYNC
f
LCDDOTCK
Line1
Line1
Line2
Line2
SCAN
Single
Single
Dual
Dual
Single
Line3
Line3
Configuration
=
Line4
Line4
-------------------------------- -
2
f
LCDC_clock
×
Line5
Line5
CLKVAL
IFWIDTH
4
8
8
16
4
LCDDOTCK Period
1
4
8
8
16
2
6462B–ATARM–6-Sep-11
6462B–ATARM–6-Sep-11
Table
38-13.