SAM9G10 Atmel Corporation, SAM9G10 Datasheet - Page 84

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SAM9G10

Manufacturer Part Number
SAM9G10
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM9G10

Flash (kbytes)
0 Kbytes
Pin Count
217
Max. Operating Frequency
266 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
96
Ext Interrupts
96
Usb Transceiver
3
Usb Speed
Full Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
1
Uart
4
Ssc
3
Sd / Emmc
1
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
No
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
16
Self Program Memory
NO
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.08 to 1.32
Fpu
No
Mpu / Mmu
No/Yes
Timers
3
Output Compare Channels
3
Input Capture Channels
3
32khz Rtc
Yes
Calibrated Rc Oscillator
No
13.11 Hardware and Software Constraints
84
SAM9G10
Note:
The SPI and NAND Flash drivers use several PIOs in alternate functions to communicate with
devices. Care must be taken when these PIOs are used by the application. The devices con-
nected could be unintentionally driven at boot time, and electrical conflicts between SPI output
pins and the connected devices may appear.
To assure correct functionality, it is recommended to plug in critical devices to other pins.
Table 13-5
are driven during the boot sequence for a period of less than 1 second if no correct boot program
is found.
Before performing the jump to the application in internal SRAM, all the PIOs and peripherals
used in the boot program are set to their reset state.
Table 13-5.
Peripheral
SPI0
SPI0
SPI0
SPI0
PIOC
PIOC
PIOC
Address Bus
Address Bus
MCI0
MCI0
MCI0
MCI0
MCI0
MCI0
TWI
TWI
DBGU
DBGU
• The DataFlash, SerialFlash, NAND Flash, SDCard
• The code is always downloaded from the device address 0x0000_0000 to the address
• The downloaded code must be position-independent or linked at address 0x0000_0000.
• The DataFlash must be connected to NPCS0 of the SPI.
must be inferior to 12 Kbytes.
0x0000_0000 of the internal SRAM (after remap).
1. Boot ROM does not support high capacity SDCards.
contains a list of pins that are driven during the boot program execution. These pins
Pins Driven during Boot Program Execution
Pin
MOSI
MISO
SPCK
NPCS0
NANDCS
NAND OE
NAND WE
NAND CLE
NAND ALE
MCDA0
MCCDA
MCCK
MCDA1
MCDA2
MCDA3
TWCK
TWD
DRXD
DTXD
(1)
, and EEPROM downloaded code size
PIO Line
PIOC14
PIOA10
PIOC0
PIOC1
PIOA1
PIOA0
PIOA2
PIOA3
PIOA0
PIOA1
PIOA2
PIOA4
PIOA5
PIOA6
PIOA8
PIOA7
PIOA9
6462B–ATARM–6-Sep-11
A21
A22

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