S1D13505 Epson Electronics America, Inc., S1D13505 Datasheet - Page 150
S1D13505
Manufacturer Part Number
S1D13505
Description
LCD Controller
Manufacturer
Epson Electronics America, Inc.
Datasheet
1.S1D13505.pdf
(566 pages)
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Average Bandwidth
S1D13505
X23A-A-001-14
• Single Panel.
• CRT.
• Dual Monochrome/Color Panel with Half Frame Buffer Disabled.
• Simultaneous CRT + Single Panel.
• Simultaneous CRT + Dual Monochrome/Color Panel with Half Frame
• Dual Monochrome Panel with Half Frame Buffer Enabled.
• Simultaneous CRT + Dual Monochrome Panel with Half Frame
• Dual Color Panel with Half Frame Buffer Enabled.
Buffer Disabled.
Buffer Enable.
Bandwidth during display period
where B = number of MCLKs left available for CPU access after every 16 pixels drawn
where C = number of MCLKs required to service 1 CPU access (2 bytes of data)
where D = time to draw 16 pixels
The minimum function limits the bandwidth to the bandwidth available during non display period
should the display fetches constitute a small percentage of the overall memory activity.
For 16 bpp single panel/CRT/dual panel with half frame buffer disable, the number of MCLKs
required to fetch 16 pixels when PCLK = MCLK exceeds 16. In this case, the display fetch does not
allow any CPU access during the display period. CPU access can only be achieved during non
display periods.
All displays have a horizontal non display period, and a vertical non display period. The formula for
calculating the percentage of non display period is as follows
Percentage of non display period = (HTOT * VTOT - WIDTH * HEIGHT)/(HTOT * VTOT)
Percentage of non display period for CRT = (800*525 - 640*480)/(800*525) = 26.6%
Percentage of non display period for single panel = (680*482 - 640*480)/680*482) = 6.2%
Percentage of non display period for dual panel = (680*242 - 640*240)/680*242) = 6.6%
Average Bandwidth =
Percentage of non display period * Bandwidth during non display period +
(1- Percentage of non display period) * Bandwidth during display period
= (f(MCLK)/f(PCLK) * 16 - Total MCLK for Display refresh), units in MCLKs 16 pixels
= 4, units in MCLKs/2 bytes
= 16 / f(PCLK), units in 16 pixels
Display
Table 14-5: Total # MCLKs taken for Display refresh
,
= MIN (bandwidth during non display period, B/C/D)
1 bpp 2 bpp 4 bpp 8 bpp 16 bpp
11
15
4
MCLKs for Display Refresh
12
16
5
Epson Research and Development
Hardware Functional Specification
14
18
7
Vancouver Design Center
11
18
22
Issue Date: 01/02/02
19
26
30
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