S1D13505 Epson Electronics America, Inc., S1D13505 Datasheet - Page 192
S1D13505
Manufacturer Part Number
S1D13505
Description
LCD Controller
Manufacturer
Epson Electronics America, Inc.
Datasheet
1.S1D13505.pdf
(566 pages)
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Page 38
6 LCD Power Sequencing and Power Save Modes
6.1 LCD Power Sequencing
6.1.1 Registers
S1D13505
X23A-G-003-07
REG[0Dh] Display Mode Register
SwivelView
Enable
Simultaneous
Display
Option Select
Bit 1
The S1D13505 design includes a pin (LCDPWR) which may be used to control an external
LCD bias power supply. If the hardware design makes use of LCDPWR, automatic LCD
power sequencing and power save modes are available to the programmer. If LCDPWR is
not used to control an external LCD bias power supply, this section is not applicable.
The S1D13505 is designed with internal circuitry which automates LCD power sequencing
(the process of powering-on and powering-off the LCD panel). LCD power sequencing
allows the LCD bias voltage to discharge prior to shutting down the LCD signals. Power
sequencing prevents long term damage to the panel and avoids unsightly “lines” at power-
on/power-off.
Proper LCD power sequencing for power-off requires a time delay from the time the LCD
power is disabled to the time the LCD signals are shut down. Power-on requires the LCD
signals to be active prior to applying power to the LCD. This time interval varies depending
on the LCD bias power supply design. For example, the LCD bias power supply on the
S5U13505 Evaluation board requires approximately 0.5 seconds to fully discharge. Your
power supply design may vary.
For most applications internal power sequencing is the appropriate choice. However, there
may be situations where the internal time delay is insufficient to discharge the LCD bias
power supply before the LCD signals are shut down. For the sequence used to manually
power-off the LCD panel, see Section 6.1.2, “LCD Power Disable” on page 39.
The LCD Enable bit triggers all automatic power sequencing.
Setting the LCD Enable bit to 1 causes the S1D13505 to enable the LCD display. The
following sequence of events occurs:
1. Confirms the LCD power is disabled.
2. Enables the LCD signals.
3. Counts 128 frames.
4. Enables the LCD power.
Simultaneous
Display
Option Select
Bit 0
Bit-Per-Pixel
Select Bit 2
Bit-Per-Pixel
Select Bit 1
Bit-Per-Pixel
Select Bit 0
Epson Research and Development
Programming Notes and Examples
CRT Enable
Vancouver Design Center
Issue Date: 01/02/05
LCD Enable
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