r5s72060w200fpv Renesas Electronics Corporation., r5s72060w200fpv Datasheet - Page 1014

• Manufacturer Part Number: r5s72060w200fpv
• Description: 32-bit Risc Microcomputer Superhtm Risc Engine Family / Sh7200 Series
• Manufacturer: Renesas Electronics Corporation.

Section 23 High-Performance User Debugging Interface (H-UDI)
23.2
Table 23.1 Pin Configuration
Note:
Rev. 2.00 Dec. 09, 2005 Page 990 of 1152
REJ09B0191-0200
Pin Name
H-UDI serial data input/output
clock pin
Mode select input pin
H-UDI reset input pin
H-UDI serial data input pin
H-UDI serial data output pin
ASE mode select pin
*
Input/Output Pins
When the emulator is not in use, fix this pin to the high level.
TCK
TRST
ASEMD*
Symbol
TMS
TDI
TDO
Input
Input
Input
Input
I/O
Input
Output
Function
Data is serially supplied to the H-UDI from
the data input pin (TDI), and output from
the data output pin (TDO), in
synchronization with this clock.
The state of the TAP control circuit is
determined by changing this signal in
synchronization with TCK. For the protocol,
see figure 23.2.
Input is accepted asynchronously with
respect to TCK, and when low, the H-UDI is
reset. TRST must be low for a constant
period when power is turned on regardless
of using the H-UDI function. See section
23.4.2, Reset Configuration, for more
information.
Data transfer to the H-UDI is executed by
changing this signal in synchronization with
TCK.
Data read from the H-UDI is executed by
reading this pin in synchronization with
TCK. The initial value of the data output
timing is the TCK falling edge. This can be
changed to the TCK rising edge by
inputting the TDO change timing switch
command to SDIR. See section 23.4.3,
TDO Output Timing, for more information.
If a low level is input at the ASEMD pin
while the RES pin is asserted, ASE mode is
entered; if a high level is input, normal
mode is entered. In ASE mode, dedicated
emulator function can be used. The input
level at the ASEMD pin should be held for
at least one cycle after RES negation.