r5s72060w200fpv Renesas Electronics Corporation., r5s72060w200fpv Datasheet - Page 389

• Manufacturer Part Number: r5s72060w200fpv
• Description: 32-bit Risc Microcomputer Superhtm Risc Engine Family / Sh7200 Series
• Manufacturer: Renesas Electronics Corporation.

Notes: 1. For the HE and TE bits in CHCRn, only 0 can be written to clear the flags after 1 is
9.3.1
The DMA source address registers (SAR) are 32-bit readable/writable registers that specify the
source address of a DMA transfer. During a DMA transfer, these registers indicate the next source
address. When the data of an external device with DACK is transferred in single address mode,
SAR is ignored.
To transfer data in word (2-byte), longword (4-byte), or 16-byte unit, specify the address with 2-
byte, 4-byte, or16-byte address boundary respectively.
SAR is initialized to H'00000000 by a power-on reset and retains the value in manual reset,
software standby mode, and module standby mode.
Initial value:
Initial value:
Channel
Common
0 and 1
2 and 3
4 and 5
6 and 7
R/W:
R/W:
Bit:
Bit:
2. For the AE and NMIF bits in DMAOR, only 0 can be written to clear the flags after 1 is
DMA Source Address Registers (SAR)
R/W
R/W
read.
read.
31
15
Register Name
DMA operation register DMAOR
DMA extension
resource selector 0
DMA extension
resource selector 1
DMA extension
resource selector 2
DMA extension
resource selector 3
0
0
-
-
R/W
R/W
30
14
0
0
-
-
R/W
R/W
29
13
0
0
-
-
R/W
R/W
28
12
0
0
-
-
R/W
R/W
27
11
0
0
-
-
Abbreviation R/W
DMARS0
DMARS1
DMARS2
DMARS3
R/W
R/W
26
10
0
0
-
-
R/W
R/W
25
0
9
0
-
-
R/W
R/W
24
0
8
0
R/W*
R/W
R/W
R/W
R/W
-
-
Section 9 Direct Memory Access Controller (DMAC)
R/W
R/W
23
0
7
0
2
-
-
Initial Value
H'0000
H'0000
H'0000
H'0000
H'0000
Rev. 2.00 Dec. 09, 2005 Page 365 of 1152
R/W
R/W
22
0
6
0
-
-
R/W
R/W
21
0
5
0
-
-
R/W
R/W
20
0
4
0
-
Address
-
H'FFFE1200
H'FFFE1300
H'FFFE1304
H'FFFE1308
H'FFFE130C 16
R/W
R/W
19
0
3
0
-
-
REJ09B0191-0200
R/W
R/W
18
0
2
0
-
-
R/W
R/W
Access
Size
8, 16
16
16
16
17
0
1
0
-
-
R/W
R/W
16
0
0
0
-
-