r5s72060w200fpv Renesas Electronics Corporation., r5s72060w200fpv Datasheet - Page 734

• Manufacturer Part Number: r5s72060w200fpv
• Description: 32-bit Risc Microcomputer Superhtm Risc Engine Family / Sh7200 Series
• Manufacturer: Renesas Electronics Corporation.

Section 14 Watchdog Timer (WDT)
Rev. 2.00 Dec. 09, 2005 Page 710 of 1152
REJ09B0191-0200
Bit
5
4, 3
2 to 0
Bit Name
TME

CKS[2:0]
0
000
Initial
Value
All 1
R/W
R/W
R
R/W
Timer Enable
Description
Starts and stops timer operation. Clear this bit to 0
when using the WDT in software standby mode or
when changing the clock frequency.
0: Timer disabled
1: Timer enabled
Reserved
These bits are always read as 1. The write value
should always be 1.
Clock Select
These bits select the clock to be used for the WTCNT
count from the eight types obtainable by dividing the
peripheral clock (Pφ). The overflow period that is
shown inside the parenthesis in the table is the value
when the peripheral clock (Pφ) is 25 MHz.
Note: If bits CKS[2:0] are modified when the WDT is
Bits 2 to 0
000:
001:
010:
011:
100:
101:
110:
111:
Count-up stops and WTCNT value is retained
running, the up-count may not be performed
correctly. Ensure that these bits are modified
only when the WDT is not running.
Clock Ratio
1 × Pφ
1/64 × Pφ
1/128 × Pφ
1/256 × Pφ
1/512 × Pφ
1/1024 × Pφ
1/4096 × Pφ
1/16384 × Pφ
Overflow Cycle
10.2 µs
655.4 µs
1.3 ms
2.6 ms
5.2 ms
10.5 ms
41.9 ms
167.8 ms