r5s72060w200fpv Renesas Electronics Corporation., r5s72060w200fpv Datasheet - Page 421

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r5s72060w200fpv

Manufacturer Part Number
r5s72060w200fpv
Description
32-bit Risc Microcomputer Superhtm Risc Engine Family / Sh7200 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet

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0
(b) Single Address Mode
In single address mode, both the transfer source and destination are external devices, either of
them is accessed (selected) by the DACK signal, and the other device is accessed by an address. In
this mode, the DMAC performs one DMA transfer in one bus cycle, accessing one of the external
devices by outputting the DACK transfer request acknowledge signal to it, and at the same time
outputting an address to the other device involved in the transfer. For example, in the case of
transfer between external memory and an external device with DACK shown in figure 9.7, when
the external device outputs data to the data bus, that data is written to the external memory in the
same bus cycle.
Two kinds of transfer are possible in single address mode: (1) transfer between an external device
with DACK and a memory-mapped external device, and (2) transfer between an external device
with DACK and external memory. In both cases, only the external request signal (DREQ) is used
for transfer requests.
Figure 9.8 shows an example of DMA transfer timing in single address mode.
This LSI
Figure 9.7 Data Flow in Single Address Mode
DMAC
External address bus
DACK
DREQ
External data bus
Section 9 Direct Memory Access Controller (DMAC)
Data flow (from memory to device)
Data flow (from device to memory)
Rev. 2.00 Dec. 09, 2005 Page 397 of 1152
External device
with DACK
External
memory
REJ09B0191-0200

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